[PATCH] D11631: [mips][microMIPS] Implement LWLE, LWRE, SWLE and SWRE instructions

[Daniel Sanders via llvm-commits]

dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.

LGTM with some nits


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Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:288-290
@@ +287,5 @@
+static DecodeStatus DecodeMemMMImm9(MCInst &Inst,
+                                     unsigned Insn,
+                                     uint64_t Address,
+                                     const void *Decoder);
+
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Indentation

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Comment at: lib/Target/Mips/MicroMipsInstrFormats.td:405
@@ -404,1 +404,3 @@
 
+class STEVA_LDEVA_FM_MM<bits<4> type, bits<3> funct> {
+  bits<5> rt;
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Naming convention: Should begin with POOL32C_

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Comment at: lib/Target/Mips/MicroMipsInstrFormats.td:407
@@ +406,3 @@
+  bits<5> rt;
+  bits<21> addr;
+
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Assign to 'base' and 'offset' to make special encoding self documenting

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Comment at: lib/Target/Mips/MicroMipsInstrInfo.td:717-726
@@ -716,2 +716,12 @@
                LWL_FM_MM<0x9>;
+  let DecoderMethod = "DecodeMemMMImm9" in {
+    def LWLE_MM : LoadLeftRightMM<"lwle", MipsLWL, GPR32Opnd, mem_mm_12>,
+                 STEVA_LDEVA_FM_MM<0x6, 0x2>;
+    def LWRE_MM : LoadLeftRightMM<"lwre", MipsLWR, GPR32Opnd, mem_mm_12>,
+                 STEVA_LDEVA_FM_MM<0x6, 0x3>;
+    def SWLE_MM : StoreLeftRightMM<"swle", MipsSWL, GPR32Opnd, mem_mm_12>,
+               STEVA_LDEVA_FM_MM<0xa, 0x0>;
+    def SWRE_MM : StoreLeftRightMM<"swre", MipsSWR, GPR32Opnd, mem_mm_12>,
+                 STEVA_LDEVA_FM_MM<0xa, 0x1>, ISA_MIPS1_NOT_32R6_64R6;
+  }
 
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Indentation


http://reviews.llvm.org/D11631