[lld] r246902 - [elf2] Add 32S and 64 relocations (needed for musl).

[Davide Italiano via llvm-commits]

On Tue, Sep 8, 2015 at 8:00 PM, Sean Silva <chisophugis at gmail.com> wrote:
>
>
> On Fri, Sep 4, 2015 at 5:46 PM, Davide Italiano via llvm-commits
> <llvm-commits at lists.llvm.org> wrote:
>>
>> On Fri, Sep 4, 2015 at 5:36 PM, Michael J. Spencer via llvm-commits
>> <llvm-commits at lists.llvm.org> wrote:
>> > Author: mspencer
>> > Date: Fri Sep  4 19:36:03 2015
>> > New Revision: 246902
>> >
>> > URL: http://llvm.org/viewvc/llvm-project?rev=246902&view=rev
>> > Log:
>> > [elf2] Add 32S and 64 relocations (needed for musl).
>> >
>> > It wasn't obvious what the assembly was to generate these relocations,
>> > so I did the test with yaml.
>> >
>>
>> It is actually obvious.
>> Example 32S:
>>
>> .text
>> blah:
>>   movl $blah, %rdx
>
>
> Wouldn't this generate R_X86_64_32 instead?
>

No, it's invalid ASM I think (there's a typo). movl can't have a
64-bit register as second operand. The correct example is movq $blah,
%rdx.

 % ./llvm-readobj -r ./blah

File: ./blah
Format: ELF64-x86-64
Arch: x86_64
AddressSize: 64bit
LoadName:
Relocations [
  Section (3) .rela.text {
    0x3 R_X86_64_32S .text 0x0
  }
]