[PATCH] D12635: merge vector stores into wider vector stores and fix AArch64 misaligned access TLI hook (PR21711)

[Matt Arsenault via llvm-commits]

arsenm added a subscriber: arsenm.

================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:804
@@ +803,3 @@
+    // On Cyclone, unaligned 128-bit stores are slow.
+    *Fast = !Subtarget->isCyclone() || VT.getSizeInBits() != 128 ||
+            // See comments in performSTORECombine() for more details about
----------------
Pedantry: using VT.getStoreSize() would be preferable 

================
Comment at: test/CodeGen/AArch64/merge-store.ll:30
@@ +29,3 @@
+
+define void @merge_vec_extract_stores(<4 x float> %v1, <2 x float>* %ptr) {
+  %idx0 = getelementptr inbounds <2 x float>, <2 x float>* %ptr, i64 3
----------------
Can you add some more test cases with different combination sized vectors? I would like to see a testcase that might try to combine multiple 3x vectors


http://reviews.llvm.org/D12635