[PATCH] D10539: [mips] Handling of immediates bigger than 16 bits

[Daniel Sanders via llvm-commits]

dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.

LGTM with the remaining nits fixed.

I also noticed a few more on this read-through


================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1693-1700
@@ +1692,10 @@
+  case Mips::SLTiu:
+    if ((Inst.getNumOperands() == 3) &&
+        Inst.getOperand(0).isReg() &&
+        Inst.getOperand(1).isReg() &&
+        Inst.getOperand(2).isImm()) {
+      int64_t ImmValue = Inst.getOperand(2).getImm();
+      return !isInt<16>(ImmValue);
+  } else
+      return false;
+  case Mips::ANDi:
----------------
Nit: Indentation and else-after-return

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1696-1699
@@ +1695,6 @@
+        Inst.getOperand(1).isReg() &&
+        Inst.getOperand(2).isImm()) {
+      int64_t ImmValue = Inst.getOperand(2).getImm();
+      return !isInt<16>(ImmValue);
+  } else
+      return false;
----------------
The 'addiu	$2, $2, %lo(_gp_disp)' ? Ok, that makes sense.

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1702-1704
@@ +1701,5 @@
+  case Mips::ANDi:
+  case Mips::ORi:
+  case Mips::XORi:
+    if ((Inst.getNumOperands() == 3) &&
+        Inst.getOperand(0).isReg() &&
----------------
This has been marked done but the else-after-return is still there

================
Comment at: lib/Target/Mips/MipsInstrInfo.td:1697-1698
@@ -1696,1 +1696,4 @@
 
+def NORImm : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm),
+                      "nor\t$rs, $rt, $imm"> ;
+
----------------
Indentation


http://reviews.llvm.org/D10539