[llvm] r246921 - [X86] Updated vector popcnt tests. Added vec512 tests.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 5 02:59:59 PDT 2015
Author: rksimon
Date: Sat Sep 5 04:59:59 2015
New Revision: 246921
URL: http://llvm.org/viewvc/llvm-project?rev=246921&view=rev
Log:
[X86] Updated vector popcnt tests. Added vec512 tests.
Added:
llvm/trunk/test/CodeGen/X86/vector-popcnt-512.ll
Modified:
llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll
llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll
Modified: llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll?rev=246921&r1=246920&r2=246921&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll Sat Sep 5 04:59:59 2015
@@ -1,13 +1,11 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
-target triple = "x86_64-unknown-unknown"
-
-define <2 x i64> @testv2i64(<2 x i64> %in) {
+define <2 x i64> @testv2i64(<2 x i64> %in) nounwind {
; SSE2-LABEL: testv2i64:
; SSE2: # BB#0:
; SSE2-NEXT: movdqa %xmm0, %xmm1
@@ -99,7 +97,7 @@ define <2 x i64> @testv2i64(<2 x i64> %i
ret <2 x i64> %out
}
-define <4 x i32> @testv4i32(<4 x i32> %in) {
+define <4 x i32> @testv4i32(<4 x i32> %in) nounwind {
; SSE2-LABEL: testv4i32:
; SSE2: # BB#0:
; SSE2-NEXT: movdqa %xmm0, %xmm1
@@ -217,7 +215,7 @@ define <4 x i32> @testv4i32(<4 x i32> %i
ret <4 x i32> %out
}
-define <8 x i16> @testv8i16(<8 x i16> %in) {
+define <8 x i16> @testv8i16(<8 x i16> %in) nounwind {
; SSE2-LABEL: testv8i16:
; SSE2: # BB#0:
; SSE2-NEXT: movdqa %xmm0, %xmm1
@@ -316,7 +314,7 @@ define <8 x i16> @testv8i16(<8 x i16> %i
ret <8 x i16> %out
}
-define <16 x i8> @testv16i8(<16 x i8> %in) {
+define <16 x i8> @testv16i8(<16 x i8> %in) nounwind {
; SSE2-LABEL: testv16i8:
; SSE2: # BB#0:
; SSE2-NEXT: movdqa %xmm0, %xmm1
@@ -400,7 +398,7 @@ define <16 x i8> @testv16i8(<16 x i8> %i
ret <16 x i8> %out
}
-define <2 x i64> @foldv2i64() {
+define <2 x i64> @foldv2i64() nounwind {
; SSE-LABEL: foldv2i64:
; SSE: # BB#0:
; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,64]
@@ -414,7 +412,7 @@ define <2 x i64> @foldv2i64() {
ret <2 x i64> %out
}
-define <4 x i32> @foldv4i32() {
+define <4 x i32> @foldv4i32() nounwind {
; SSE-LABEL: foldv4i32:
; SSE: # BB#0:
; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,32,0,8]
@@ -428,7 +426,7 @@ define <4 x i32> @foldv4i32() {
ret <4 x i32> %out
}
-define <8 x i16> @foldv8i16() {
+define <8 x i16> @foldv8i16() nounwind {
; SSE-LABEL: foldv8i16:
; SSE: # BB#0:
; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,16,0,8,0,3,2,3]
@@ -442,7 +440,7 @@ define <8 x i16> @foldv8i16() {
ret <8 x i16> %out
}
-define <16 x i8> @foldv16i8() {
+define <16 x i8> @foldv16i8() nounwind {
; SSE-LABEL: foldv16i8:
; SSE: # BB#0:
; SSE-NEXT: movaps {{.*#+}} xmm0 = [0,8,0,8,0,3,2,3,7,7,1,1,1,1,1,1]
Modified: llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll?rev=246921&r1=246920&r2=246921&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll Sat Sep 5 04:59:59 2015
@@ -1,9 +1,7 @@
-; RUN: llc < %s -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
-target triple = "x86_64-unknown-unknown"
-
-define <4 x i64> @testv4i64(<4 x i64> %in) {
+define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
; AVX1-LABEL: testv4i64:
; AVX1: # BB#0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
@@ -44,7 +42,7 @@ define <4 x i64> @testv4i64(<4 x i64> %i
ret <4 x i64> %out
}
-define <8 x i32> @testv8i32(<8 x i32> %in) {
+define <8 x i32> @testv8i32(<8 x i32> %in) nounwind {
; AVX1-LABEL: testv8i32:
; AVX1: # BB#0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
@@ -97,7 +95,7 @@ define <8 x i32> @testv8i32(<8 x i32> %i
ret <8 x i32> %out
}
-define <16 x i16> @testv16i16(<16 x i16> %in) {
+define <16 x i16> @testv16i16(<16 x i16> %in) nounwind {
; AVX1-LABEL: testv16i16:
; AVX1: # BB#0:
; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
@@ -142,7 +140,7 @@ define <16 x i16> @testv16i16(<16 x i16>
ret <16 x i16> %out
}
-define <32 x i8> @testv32i8(<32 x i8> %in) {
+define <32 x i8> @testv32i8(<32 x i8> %in) nounwind {
; AVX1-LABEL: testv32i8:
; AVX1: # BB#0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
@@ -178,38 +176,38 @@ define <32 x i8> @testv32i8(<32 x i8> %i
ret <32 x i8> %out
}
-define <4 x i64> @foldv4i64() {
-; AVX-LABEL: foldv4i64:
-; AVX: # BB#0:
-; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [1,64,0,8]
-; AVX-NEXT: retq
+define <4 x i64> @foldv4i64() nounwind {
+; ALL-LABEL: foldv4i64:
+; ALL: # BB#0:
+; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [1,64,0,8]
+; ALL-NEXT: retq
%out = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> <i64 256, i64 -1, i64 0, i64 255>)
ret <4 x i64> %out
}
-define <8 x i32> @foldv8i32() {
-; AVX-LABEL: foldv8i32:
-; AVX: # BB#0:
-; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [1,32,0,8,16,3,2,3]
-; AVX-NEXT: retq
+define <8 x i32> @foldv8i32() nounwind {
+; ALL-LABEL: foldv8i32:
+; ALL: # BB#0:
+; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [1,32,0,8,16,3,2,3]
+; ALL-NEXT: retq
%out = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> <i32 256, i32 -1, i32 0, i32 255, i32 -65536, i32 7, i32 24, i32 88>)
ret <8 x i32> %out
}
-define <16 x i16> @foldv16i16() {
-; AVX-LABEL: foldv16i16:
-; AVX: # BB#0:
-; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [1,16,0,8,0,3,2,3,15,7,1,1,1,1,1,1]
-; AVX-NEXT: retq
+define <16 x i16> @foldv16i16() nounwind {
+; ALL-LABEL: foldv16i16:
+; ALL: # BB#0:
+; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [1,16,0,8,0,3,2,3,15,7,1,1,1,1,1,1]
+; ALL-NEXT: retq
%out = call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> <i16 256, i16 -1, i16 0, i16 255, i16 -65536, i16 7, i16 24, i16 88, i16 -2, i16 254, i16 1, i16 2, i16 4, i16 8, i16 16, i16 32>)
ret <16 x i16> %out
}
-define <32 x i8> @foldv32i8() {
-; AVX-LABEL: foldv32i8:
-; AVX: # BB#0:
-; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [0,8,0,8,0,3,2,3,7,7,1,1,1,1,1,1,1,1,0,0,1,2,3,4,5,6,7,8,2,2,3,7]
-; AVX-NEXT: retq
+define <32 x i8> @foldv32i8() nounwind {
+; ALL-LABEL: foldv32i8:
+; ALL: # BB#0:
+; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [0,8,0,8,0,3,2,3,7,7,1,1,1,1,1,1,1,1,0,0,1,2,3,4,5,6,7,8,2,2,3,7]
+; ALL-NEXT: retq
%out = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> <i8 256, i8 -1, i8 0, i8 255, i8 -65536, i8 7, i8 24, i8 88, i8 -2, i8 254, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 128, i8 256, i8 -256, i8 -128, i8 -64, i8 -32, i8 -16, i8 -8, i8 -4, i8 -2, i8 -1, i8 3, i8 5, i8 7, i8 127>)
ret <32 x i8> %out
}
Added: llvm/trunk/test/CodeGen/X86/vector-popcnt-512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-popcnt-512.ll?rev=246921&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-popcnt-512.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vector-popcnt-512.ll Sat Sep 5 04:59:59 2015
@@ -0,0 +1,160 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512CD
+
+define <8 x i64> @testv8i64(<8 x i64> %in) nounwind {
+; ALL-LABEL: testv8i64:
+; ALL: ## BB#0:
+; ALL-NEXT: vextracti32x4 $3, %zmm0, %xmm1
+; ALL-NEXT: vpextrq $1, %xmm1, %rax
+; ALL-NEXT: popcntq %rax, %rax
+; ALL-NEXT: vmovq %rax, %xmm2
+; ALL-NEXT: vmovq %xmm1, %rax
+; ALL-NEXT: popcntq %rax, %rax
+; ALL-NEXT: vmovq %rax, %xmm1
+; ALL-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
+; ALL-NEXT: vextracti32x4 $2, %zmm0, %xmm2
+; ALL-NEXT: vpextrq $1, %xmm2, %rax
+; ALL-NEXT: popcntq %rax, %rax
+; ALL-NEXT: vmovq %rax, %xmm3
+; ALL-NEXT: vmovq %xmm2, %rax
+; ALL-NEXT: popcntq %rax, %rax
+; ALL-NEXT: vmovq %rax, %xmm2
+; ALL-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; ALL-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
+; ALL-NEXT: vextracti32x4 $1, %zmm0, %xmm2
+; ALL-NEXT: vpextrq $1, %xmm2, %rax
+; ALL-NEXT: popcntq %rax, %rax
+; ALL-NEXT: vmovq %rax, %xmm3
+; ALL-NEXT: vmovq %xmm2, %rax
+; ALL-NEXT: popcntq %rax, %rax
+; ALL-NEXT: vmovq %rax, %xmm2
+; ALL-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; ALL-NEXT: vpextrq $1, %xmm0, %rax
+; ALL-NEXT: popcntq %rax, %rax
+; ALL-NEXT: vmovq %rax, %xmm3
+; ALL-NEXT: vmovq %xmm0, %rax
+; ALL-NEXT: popcntq %rax, %rax
+; ALL-NEXT: vmovq %rax, %xmm0
+; ALL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
+; ALL-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
+; ALL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
+; ALL-NEXT: retq
+ %out = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %in)
+ ret <8 x i64> %out
+}
+
+define <16 x i32> @testv16i32(<16 x i32> %in) nounwind {
+; ALL-LABEL: testv16i32:
+; ALL: ## BB#0:
+; ALL-NEXT: vextracti32x4 $3, %zmm0, %xmm1
+; ALL-NEXT: vpextrd $1, %xmm1, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vmovd %xmm1, %ecx
+; ALL-NEXT: popcntl %ecx, %ecx
+; ALL-NEXT: vmovd %ecx, %xmm2
+; ALL-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2
+; ALL-NEXT: vpextrd $2, %xmm1, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
+; ALL-NEXT: vpextrd $3, %xmm1, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vpinsrd $3, %eax, %xmm2, %xmm1
+; ALL-NEXT: vextracti32x4 $2, %zmm0, %xmm2
+; ALL-NEXT: vpextrd $1, %xmm2, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vmovd %xmm2, %ecx
+; ALL-NEXT: popcntl %ecx, %ecx
+; ALL-NEXT: vmovd %ecx, %xmm3
+; ALL-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3
+; ALL-NEXT: vpextrd $2, %xmm2, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
+; ALL-NEXT: vpextrd $3, %xmm2, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vpinsrd $3, %eax, %xmm3, %xmm2
+; ALL-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
+; ALL-NEXT: vextracti32x4 $1, %zmm0, %xmm2
+; ALL-NEXT: vpextrd $1, %xmm2, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vmovd %xmm2, %ecx
+; ALL-NEXT: popcntl %ecx, %ecx
+; ALL-NEXT: vmovd %ecx, %xmm3
+; ALL-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3
+; ALL-NEXT: vpextrd $2, %xmm2, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
+; ALL-NEXT: vpextrd $3, %xmm2, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vpinsrd $3, %eax, %xmm3, %xmm2
+; ALL-NEXT: vpextrd $1, %xmm0, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vmovd %xmm0, %ecx
+; ALL-NEXT: popcntl %ecx, %ecx
+; ALL-NEXT: vmovd %ecx, %xmm3
+; ALL-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3
+; ALL-NEXT: vpextrd $2, %xmm0, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
+; ALL-NEXT: vpextrd $3, %xmm0, %eax
+; ALL-NEXT: popcntl %eax, %eax
+; ALL-NEXT: vpinsrd $3, %eax, %xmm3, %xmm0
+; ALL-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
+; ALL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
+; ALL-NEXT: retq
+ %out = call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %in)
+ ret <16 x i32> %out
+}
+
+define <32 x i16> @testv32i16(<32 x i16> %in) nounwind {
+; ALL-LABEL: testv32i16:
+; ALL: ## BB#0:
+; ALL-NEXT: vmovdqa {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; ALL-NEXT: vpand %ymm2, %ymm0, %ymm3
+; ALL-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
+; ALL-NEXT: vpshufb %ymm3, %ymm4, %ymm3
+; ALL-NEXT: vpsrlw $4, %ymm0, %ymm0
+; ALL-NEXT: vpand %ymm2, %ymm0, %ymm0
+; ALL-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; ALL-NEXT: vpaddb %ymm3, %ymm0, %ymm0
+; ALL-NEXT: vpsllw $8, %ymm0, %ymm3
+; ALL-NEXT: vpaddb %ymm0, %ymm3, %ymm0
+; ALL-NEXT: vpsrlw $8, %ymm0, %ymm0
+; ALL-NEXT: vpand %ymm2, %ymm1, %ymm3
+; ALL-NEXT: vpshufb %ymm3, %ymm4, %ymm3
+; ALL-NEXT: vpsrlw $4, %ymm1, %ymm1
+; ALL-NEXT: vpand %ymm2, %ymm1, %ymm1
+; ALL-NEXT: vpshufb %ymm1, %ymm4, %ymm1
+; ALL-NEXT: vpaddb %ymm3, %ymm1, %ymm1
+; ALL-NEXT: vpsllw $8, %ymm1, %ymm2
+; ALL-NEXT: vpaddb %ymm1, %ymm2, %ymm1
+; ALL-NEXT: vpsrlw $8, %ymm1, %ymm1
+; ALL-NEXT: retq
+ %out = call <32 x i16> @llvm.ctpop.v32i16(<32 x i16> %in)
+ ret <32 x i16> %out
+}
+
+define <64 x i8> @testv64i8(<64 x i8> %in) nounwind {
+; ALL-LABEL: testv64i8:
+; ALL: ## BB#0:
+; ALL-NEXT: vmovdqa {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; ALL-NEXT: vpand %ymm2, %ymm0, %ymm3
+; ALL-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
+; ALL-NEXT: vpshufb %ymm3, %ymm4, %ymm3
+; ALL-NEXT: vpsrlw $4, %ymm0, %ymm0
+; ALL-NEXT: vpand %ymm2, %ymm0, %ymm0
+; ALL-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; ALL-NEXT: vpaddb %ymm3, %ymm0, %ymm0
+; ALL-NEXT: vpand %ymm2, %ymm1, %ymm3
+; ALL-NEXT: vpshufb %ymm3, %ymm4, %ymm3
+; ALL-NEXT: vpsrlw $4, %ymm1, %ymm1
+; ALL-NEXT: vpand %ymm2, %ymm1, %ymm1
+; ALL-NEXT: vpshufb %ymm1, %ymm4, %ymm1
+; ALL-NEXT: vpaddb %ymm3, %ymm1, %ymm1
+; ALL-NEXT: retq
+ %out = call <64 x i8> @llvm.ctpop.v64i8(<64 x i8> %in)
+ ret <64 x i8> %out
+}
+
+declare <8 x i64> @llvm.ctpop.v8i64(<8 x i64>)
+declare <16 x i32> @llvm.ctpop.v16i32(<16 x i32>)
+declare <32 x i16> @llvm.ctpop.v32i16(<32 x i16>)
+declare <64 x i8> @llvm.ctpop.v64i8(<64 x i8>)
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