[llvm] r246374 - Teach the target parsing framework to directly compute the length of all
Chandler Carruth via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 30 00:51:05 PDT 2015
Author: chandlerc
Date: Sun Aug 30 02:51:04 2015
New Revision: 246374
URL: http://llvm.org/viewvc/llvm-project?rev=246374&view=rev
Log:
Teach the target parsing framework to directly compute the length of all
of its strings when expanding the string literals from the macros, and
push all of the APIs to be StringRef instead of C-string APIs.
This (remarkably) removes a very non-trivial number of strlen calls. It
even deletes code and complexity from one of the primary users -- Clang.
Modified:
llvm/trunk/include/llvm/ADT/Triple.h
llvm/trunk/include/llvm/Support/TargetParser.h
llvm/trunk/lib/Support/TargetParser.cpp
llvm/trunk/lib/Support/Triple.cpp
llvm/trunk/unittests/ADT/TripleTest.cpp
Modified: llvm/trunk/include/llvm/ADT/Triple.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=246374&r1=246373&r2=246374&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/Triple.h (original)
+++ llvm/trunk/include/llvm/ADT/Triple.h Sun Aug 30 02:51:04 2015
@@ -595,7 +595,7 @@ public:
///
/// \param Arch the architecture name (e.g., "armv7s"). If it is an empty
/// string then the triple's arch name is used.
- const char* getARMCPUForArch(StringRef Arch = StringRef()) const;
+ StringRef getARMCPUForArch(StringRef Arch = StringRef()) const;
/// @}
/// @name Static helpers for IDs.
Modified: llvm/trunk/include/llvm/Support/TargetParser.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetParser.h?rev=246374&r1=246373&r2=246374&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/TargetParser.h (original)
+++ llvm/trunk/include/llvm/Support/TargetParser.h Sun Aug 30 02:51:04 2015
@@ -102,7 +102,7 @@ enum ProfileKind { PK_INVALID = 0, PK_A,
StringRef getCanonicalArchName(StringRef Arch);
// Information by ID
-const char *getFPUName(unsigned FPUKind);
+StringRef getFPUName(unsigned FPUKind);
unsigned getFPUVersion(unsigned FPUKind);
unsigned getFPUNeonSupportLevel(unsigned FPUKind);
unsigned getFPURestriction(unsigned FPUKind);
@@ -110,13 +110,13 @@ unsigned getDefaultFPU(StringRef CPU);
// FIXME: This should be moved to TargetTuple once it exists
bool getFPUFeatures(unsigned FPUKind, std::vector<const char *> &Features);
bool getHWDivFeatures(unsigned HWDivKind, std::vector<const char *> &Features);
-const char *getArchName(unsigned ArchKind);
+StringRef getArchName(unsigned ArchKind);
unsigned getArchAttr(unsigned ArchKind);
-const char *getCPUAttr(unsigned ArchKind);
-const char *getSubArch(unsigned ArchKind);
-const char *getArchExtName(unsigned ArchExtKind);
-const char *getHWDivName(unsigned HWDivKind);
-const char *getDefaultCPU(StringRef Arch);
+StringRef getCPUAttr(unsigned ArchKind);
+StringRef getSubArch(unsigned ArchKind);
+StringRef getArchExtName(unsigned ArchExtKind);
+StringRef getHWDivName(unsigned HWDivKind);
+StringRef getDefaultCPU(StringRef Arch);
// Parser
unsigned parseHWDiv(StringRef HWDiv);
Modified: llvm/trunk/lib/Support/TargetParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/TargetParser.cpp?rev=246374&r1=246373&r2=246374&view=diff
==============================================================================
--- llvm/trunk/lib/Support/TargetParser.cpp (original)
+++ llvm/trunk/lib/Support/TargetParser.cpp Sun Aug 30 02:51:04 2015
@@ -28,14 +28,17 @@ namespace {
// FIXME: TableGen this.
// The entries must appear in the order listed in ARM::FPUKind for correct indexing
struct {
- const char * Name;
+ const char *NameCStr;
+ size_t NameLength;
ARM::FPUKind ID;
ARM::FPUVersion FPUVersion;
ARM::NeonSupportLevel NeonSupport;
ARM::FPURestriction Restriction;
+
+ StringRef getName() const { return StringRef(NameCStr, NameLength); }
} FPUNames[] = {
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
- { NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION },
+ { NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION },
#include "llvm/Support/ARMTargetParser.def"
};
@@ -48,48 +51,72 @@ struct {
// Check to see if the expectation should be changed.
// FIXME: TableGen this.
struct {
- const char *Name;
+ const char *NameCStr;
+ size_t NameLength;
ARM::ArchKind ID;
- const char *CPUAttr; // CPU class in build attributes.
- const char *SubArch; // Sub-Arch name.
+ const char *CPUAttrCStr;
+ size_t CPUAttrLength;
+ const char *SubArchCStr;
+ size_t SubArchLength;
ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
+
+ StringRef getName() const { return StringRef(NameCStr, NameLength); }
+
+ // CPU class in build attributes.
+ StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
+
+ // Sub-Arch name.
+ StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
} ARCHNames[] = {
-#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR) \
- { NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR },
+#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR) \
+ {NAME, sizeof(NAME) - 1, ID, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH, \
+ sizeof(SUB_ARCH) - 1, ARCH_ATTR},
#include "llvm/Support/ARMTargetParser.def"
};
+
// List of Arch Extension names.
// FIXME: TableGen this.
struct {
- const char *Name;
+ const char *NameCStr;
+ size_t NameLength;
unsigned ID;
+
+ StringRef getName() const { return StringRef(NameCStr, NameLength); }
} ARCHExtNames[] = {
-#define ARM_ARCH_EXT_NAME(NAME, ID) { NAME, ID },
+#define ARM_ARCH_EXT_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
#include "llvm/Support/ARMTargetParser.def"
};
+
// List of HWDiv names (use getHWDivSynonym) and which architectural
// features they correspond to (use getHWDivFeatures).
// FIXME: TableGen this.
struct {
- const char *Name;
+ const char *NameCStr;
+ size_t NameLength;
unsigned ID;
+
+ StringRef getName() const { return StringRef(NameCStr, NameLength); }
} HWDivNames[] = {
-#define ARM_HW_DIV_NAME(NAME, ID) { NAME, ID },
+#define ARM_HW_DIV_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
#include "llvm/Support/ARMTargetParser.def"
};
+
// List of CPU names and their arches.
// The same CPU can have multiple arches and can be default on multiple arches.
// When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
// When this becomes table-generated, we'd probably need two tables.
// FIXME: TableGen this.
struct {
- const char *Name;
+ const char *NameCStr;
+ size_t NameLength;
ARM::ArchKind ArchID;
ARM::FPUKind DefaultFPU;
bool Default; // is $Name the default CPU for $ArchID ?
+
+ StringRef getName() const { return StringRef(NameCStr, NameLength); }
} CPUNames[] = {
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT) \
- { NAME, ID, DEFAULT_FPU, IS_DEFAULT },
+ { NAME, sizeof(NAME) - 1, ID, DEFAULT_FPU, IS_DEFAULT },
#include "llvm/Support/ARMTargetParser.def"
};
@@ -99,10 +126,10 @@ struct {
// Information by ID
// ======================================================= //
-const char *llvm::ARM::getFPUName(unsigned FPUKind) {
+StringRef llvm::ARM::getFPUName(unsigned FPUKind) {
if (FPUKind >= ARM::FK_LAST)
- return nullptr;
- return FPUNames[FPUKind].Name;
+ return StringRef();
+ return FPUNames[FPUKind].getName();
}
unsigned llvm::ARM::getFPUVersion(unsigned FPUKind) {
@@ -125,7 +152,7 @@ unsigned llvm::ARM::getFPURestriction(un
unsigned llvm::ARM::getDefaultFPU(StringRef CPU) {
for (const auto C : CPUNames) {
- if (CPU == C.Name)
+ if (CPU == C.getName())
return C.DefaultFPU;
}
return ARM::FK_INVALID;
@@ -231,22 +258,22 @@ bool llvm::ARM::getFPUFeatures(unsigned
return true;
}
-const char *llvm::ARM::getArchName(unsigned ArchKind) {
+StringRef llvm::ARM::getArchName(unsigned ArchKind) {
if (ArchKind >= ARM::AK_LAST)
- return nullptr;
- return ARCHNames[ArchKind].Name;
+ return StringRef();
+ return ARCHNames[ArchKind].getName();
}
-const char *llvm::ARM::getCPUAttr(unsigned ArchKind) {
+StringRef llvm::ARM::getCPUAttr(unsigned ArchKind) {
if (ArchKind >= ARM::AK_LAST)
- return nullptr;
- return ARCHNames[ArchKind].CPUAttr;
+ return StringRef();
+ return ARCHNames[ArchKind].getCPUAttr();
}
-const char *llvm::ARM::getSubArch(unsigned ArchKind) {
+StringRef llvm::ARM::getSubArch(unsigned ArchKind) {
if (ArchKind >= ARM::AK_LAST)
- return nullptr;
- return ARCHNames[ArchKind].SubArch;
+ return StringRef();
+ return ARCHNames[ArchKind].getSubArch();
}
unsigned llvm::ARM::getArchAttr(unsigned ArchKind) {
@@ -255,33 +282,33 @@ unsigned llvm::ARM::getArchAttr(unsigned
return ARCHNames[ArchKind].ArchAttr;
}
-const char *llvm::ARM::getArchExtName(unsigned ArchExtKind) {
+StringRef llvm::ARM::getArchExtName(unsigned ArchExtKind) {
for (const auto AE : ARCHExtNames) {
if (ArchExtKind == AE.ID)
- return AE.Name;
+ return AE.getName();
}
- return nullptr;
+ return StringRef();
}
-const char *llvm::ARM::getHWDivName(unsigned HWDivKind) {
+StringRef llvm::ARM::getHWDivName(unsigned HWDivKind) {
for (const auto D : HWDivNames) {
if (HWDivKind == D.ID)
- return D.Name;
+ return D.getName();
}
- return nullptr;
+ return StringRef();
}
-const char *llvm::ARM::getDefaultCPU(StringRef Arch) {
+StringRef llvm::ARM::getDefaultCPU(StringRef Arch) {
unsigned AK = parseArch(Arch);
if (AK == ARM::AK_INVALID)
- return nullptr;
+ return StringRef();
// Look for multiple AKs to find the default for pair AK+Name.
for (const auto CPU : CPUNames) {
if (CPU.ArchID == AK && CPU.Default)
- return CPU.Name;
+ return CPU.getName();
}
- return nullptr;
+ return StringRef();
}
// ======================================================= //
@@ -380,7 +407,7 @@ StringRef llvm::ARM::getCanonicalArchNam
unsigned llvm::ARM::parseHWDiv(StringRef HWDiv) {
StringRef Syn = getHWDivSynonym(HWDiv);
for (const auto D : HWDivNames) {
- if (Syn == D.Name)
+ if (Syn == D.getName())
return D.ID;
}
return ARM::AEK_INVALID;
@@ -389,7 +416,7 @@ unsigned llvm::ARM::parseHWDiv(StringRef
unsigned llvm::ARM::parseFPU(StringRef FPU) {
StringRef Syn = getFPUSynonym(FPU);
for (const auto F : FPUNames) {
- if (Syn == F.Name)
+ if (Syn == F.getName())
return F.ID;
}
return ARM::FK_INVALID;
@@ -400,7 +427,7 @@ unsigned llvm::ARM::parseArch(StringRef
Arch = getCanonicalArchName(Arch);
StringRef Syn = getArchSynonym(Arch);
for (const auto A : ARCHNames) {
- if (StringRef(A.Name).endswith(Syn))
+ if (A.getName().endswith(Syn))
return A.ID;
}
return ARM::AK_INVALID;
@@ -408,7 +435,7 @@ unsigned llvm::ARM::parseArch(StringRef
unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
for (const auto A : ARCHExtNames) {
- if (ArchExt == A.Name)
+ if (ArchExt == A.getName())
return A.ID;
}
return ARM::AEK_INVALID;
@@ -416,7 +443,7 @@ unsigned llvm::ARM::parseArchExt(StringR
unsigned llvm::ARM::parseCPUArch(StringRef CPU) {
for (const auto C : CPUNames) {
- if (CPU == C.Name)
+ if (CPU == C.getName())
return C.ArchID;
}
return ARM::AK_INVALID;
Modified: llvm/trunk/lib/Support/Triple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=246374&r1=246373&r2=246374&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Triple.cpp (original)
+++ llvm/trunk/lib/Support/Triple.cpp Sun Aug 30 02:51:04 2015
@@ -1290,7 +1290,7 @@ Triple Triple::getLittleEndianArchVarian
return T;
}
-const char *Triple::getARMCPUForArch(StringRef MArch) const {
+StringRef Triple::getARMCPUForArch(StringRef MArch) const {
if (MArch.empty())
MArch = getArchName();
MArch = ARM::getCanonicalArchName(MArch);
@@ -1310,10 +1310,10 @@ const char *Triple::getARMCPUForArch(Str
}
if (MArch.empty())
- return nullptr;
+ return StringRef();
- const char *CPU = ARM::getDefaultCPU(MArch);
- if (CPU)
+ StringRef CPU = ARM::getDefaultCPU(MArch);
+ if (!CPU.empty())
return CPU;
// If no specific architecture version is requested, return the minimum CPU
Modified: llvm/trunk/unittests/ADT/TripleTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/TripleTest.cpp?rev=246374&r1=246373&r2=246374&view=diff
==============================================================================
--- llvm/trunk/unittests/ADT/TripleTest.cpp (original)
+++ llvm/trunk/unittests/ADT/TripleTest.cpp Sun Aug 30 02:51:04 2015
@@ -801,181 +801,181 @@ TEST(TripleTest, getARMCPUForArch) {
// Standard ARM Architectures.
{
llvm::Triple Triple("armv4-unknown-eabi");
- EXPECT_STREQ("strongarm", Triple.getARMCPUForArch());
+ EXPECT_EQ("strongarm", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv4t-unknown-eabi");
- EXPECT_STREQ("arm7tdmi", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm7tdmi", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv5-unknown-eabi");
- EXPECT_STREQ("arm10tdmi", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm10tdmi", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv5t-unknown-eabi");
- EXPECT_STREQ("arm10tdmi", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm10tdmi", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv5e-unknown-eabi");
- EXPECT_STREQ("arm1022e", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1022e", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv5tej-unknown-eabi");
- EXPECT_STREQ("arm926ej-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm926ej-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv6-unknown-eabi");
- EXPECT_STREQ("arm1136jf-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1136jf-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv6j-unknown-eabi");
- EXPECT_STREQ("arm1136j-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1136j-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv6k-unknown-eabi");
- EXPECT_STREQ("arm1176jzf-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1176jzf-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv6zk-unknown-eabi");
- EXPECT_STREQ("arm1176jzf-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1176jzf-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv6t2-unknown-eabi");
- EXPECT_STREQ("arm1156t2-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1156t2-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv6m-unknown-eabi");
- EXPECT_STREQ("cortex-m0", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-m0", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7-unknown-eabi");
- EXPECT_STREQ("cortex-a8", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-a8", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7a-unknown-eabi");
- EXPECT_STREQ("cortex-a8", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-a8", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7m-unknown-eabi");
- EXPECT_STREQ("cortex-m3", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-m3", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7r-unknown-eabi");
- EXPECT_STREQ("cortex-r4", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-r4", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7r-unknown-eabi");
- EXPECT_STREQ("cortex-r4", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-r4", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7r-unknown-eabi");
- EXPECT_STREQ("cortex-r4", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-r4", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7r-unknown-eabi");
- EXPECT_STREQ("cortex-r4", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-r4", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv8a-unknown-eabi");
- EXPECT_STREQ("cortex-a53", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-a53", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv8.1a-unknown-eabi");
- EXPECT_STREQ("generic", Triple.getARMCPUForArch());
+ EXPECT_EQ("generic", Triple.getARMCPUForArch());
}
// Non-synonym names, using -march style, not default arch.
{
llvm::Triple Triple("arm");
- EXPECT_STREQ("cortex-a8", Triple.getARMCPUForArch("armv7-a"));
+ EXPECT_EQ("cortex-a8", Triple.getARMCPUForArch("armv7-a"));
}
{
llvm::Triple Triple("arm");
- EXPECT_STREQ("cortex-m3", Triple.getARMCPUForArch("armv7-m"));
+ EXPECT_EQ("cortex-m3", Triple.getARMCPUForArch("armv7-m"));
}
{
llvm::Triple Triple("arm");
- EXPECT_STREQ("cortex-a53", Triple.getARMCPUForArch("armv8"));
+ EXPECT_EQ("cortex-a53", Triple.getARMCPUForArch("armv8"));
}
{
llvm::Triple Triple("arm");
- EXPECT_STREQ("cortex-a53", Triple.getARMCPUForArch("armv8-a"));
+ EXPECT_EQ("cortex-a53", Triple.getARMCPUForArch("armv8-a"));
}
// Platform specific defaults.
{
llvm::Triple Triple("arm--nacl");
- EXPECT_STREQ("cortex-a8", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-a8", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv6-unknown-freebsd");
- EXPECT_STREQ("arm1176jzf-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1176jzf-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("thumbv6-unknown-freebsd");
- EXPECT_STREQ("arm1176jzf-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1176jzf-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armebv6-unknown-freebsd");
- EXPECT_STREQ("arm1176jzf-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1176jzf-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("arm--win32");
- EXPECT_STREQ("cortex-a9", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-a9", Triple.getARMCPUForArch());
}
// Some alternative architectures
{
llvm::Triple Triple("xscale-unknown-eabi");
- EXPECT_STREQ("xscale", Triple.getARMCPUForArch());
+ EXPECT_EQ("xscale", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("iwmmxt-unknown-eabi");
- EXPECT_STREQ("iwmmxt", Triple.getARMCPUForArch());
+ EXPECT_EQ("iwmmxt", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7s-apple-ios7");
- EXPECT_STREQ("swift", Triple.getARMCPUForArch());
+ EXPECT_EQ("swift", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7em-apple-ios7");
- EXPECT_STREQ("cortex-m4", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-m4", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv7l-linux-gnueabihf");
- EXPECT_STREQ("cortex-a8", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-a8", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv6sm-apple-ios7");
- EXPECT_STREQ("cortex-m0", Triple.getARMCPUForArch());
+ EXPECT_EQ("cortex-m0", Triple.getARMCPUForArch());
}
// armeb is permitted, but armebeb is not
{
llvm::Triple Triple("armeb-none-eabi");
- EXPECT_STREQ("arm7tdmi", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm7tdmi", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armebeb-none-eabi");
- EXPECT_EQ(nullptr, Triple.getARMCPUForArch());
+ EXPECT_EQ("", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armebv6eb-none-eabi");
- EXPECT_EQ(nullptr, Triple.getARMCPUForArch());
+ EXPECT_EQ("", Triple.getARMCPUForArch());
}
// armebv6 and armv6eb are permitted, but armebv6eb is not
{
llvm::Triple Triple("armebv6-non-eabi");
- EXPECT_STREQ("arm1136jf-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1136jf-s", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armv6eb-none-eabi");
- EXPECT_STREQ("arm1136jf-s", Triple.getARMCPUForArch());
+ EXPECT_EQ("arm1136jf-s", Triple.getARMCPUForArch());
}
// xscaleeb is permitted, but armebxscale is not
{
llvm::Triple Triple("xscaleeb-none-eabi");
- EXPECT_STREQ("xscale", Triple.getARMCPUForArch());
+ EXPECT_EQ("xscale", Triple.getARMCPUForArch());
}
{
llvm::Triple Triple("armebxscale-none-eabi");
- EXPECT_EQ(nullptr, Triple.getARMCPUForArch());
+ EXPECT_EQ("", Triple.getARMCPUForArch());
}
}
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