[PATCH] D12442: MachineBasicBlock: Save LaneMask with livein registers.
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 28 11:43:15 PDT 2015
MatzeB created this revision.
MatzeB added a reviewer: qcolombet.
MatzeB added subscribers: atrick, llvm-commits.
MatzeB set the repository for this revision to rL LLVM.
Herald added subscribers: qcolombet, MatzeB.
With subregister liveness we can detect the case where only parts of a
register are live in, this is expressed as a 32bit lanemask. The current
code only keeps registers in the live-in list and therefore enumerated
all subregisters affected by the lanemask. This turned out to be too
conservative as the subregister may also cover additional parts of the
lanemask which are not live. Expressing a given lanemask by enumerating
a minimum set of subregisters is computationally expensive so the best
solution is to simply change the live-in list to store the lanemasks as
well. This will reduce memory usage for targets using subregister
liveness and slightly increase it for other targets.
Repository:
rL LLVM
http://reviews.llvm.org/D12442
Files:
include/llvm/CodeGen/MachineBasicBlock.h
include/llvm/CodeGen/RegisterScavenging.h
lib/CodeGen/AggressiveAntiDepBreaker.cpp
lib/CodeGen/CriticalAntiDepBreaker.cpp
lib/CodeGen/DeadMachineInstructionElim.cpp
lib/CodeGen/ExecutionDepsFix.cpp
lib/CodeGen/LiveIntervalAnalysis.cpp
lib/CodeGen/LivePhysRegs.cpp
lib/CodeGen/LiveVariables.cpp
lib/CodeGen/MIRPrinter.cpp
lib/CodeGen/MachineBasicBlock.cpp
lib/CodeGen/MachineLICM.cpp
lib/CodeGen/MachineVerifier.cpp
lib/CodeGen/RegAllocFast.cpp
lib/CodeGen/RegisterScavenging.cpp
lib/CodeGen/ScheduleDAGInstrs.cpp
lib/CodeGen/TailDuplication.cpp
lib/CodeGen/VirtRegMap.cpp
lib/Target/ARM/ARMFrameLowering.cpp
lib/Target/Hexagon/HexagonCFGOptimizer.cpp
lib/Target/Mips/MipsDelaySlotFiller.cpp
lib/Target/SystemZ/SystemZShortenInst.cpp
lib/Target/X86/X86FloatingPoint.cpp
lib/Target/X86/X86FrameLowering.cpp
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