[PATCH] D12279: [mips][microMIPS] Implement ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions

[Zlatko Buljan via llvm-commits]

zbuljan added a comment.

We only added tests in previous patch because opcodes of microMIPSR6 instructions ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP are identical to their microMIPS(R3) equivalents and all tests have passed.
Later, we made another patch that changes decoder namespace.
If we commit that patch, disassembler tests for ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions would fail.
So we realized that we have to make new patch which implements ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions.
If we commit this patch which implements ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions and after that patch that changes decoder namespace all tests pass.

Is it OK to commit this patch?


http://reviews.llvm.org/D12279