[PATCH] D11181: [mips][microMIPS] Implement BC16, BEQZC16 and BNEZC16 instructions

[Zlatko Buljan via llvm-commits]

zbuljan updated this revision to Diff 32951.
zbuljan added a comment.

Both case-statements placed in front of one copy of the code in MipsAsmParser::expandInstruction.
hasMips64r6() removed in MipsAsmParser::expandUncondBranchMMPseudo because it was redundant.
Added test for delay slot of instruction at the end of MipsAsmParser::expandUncondBranchMMPseudo.
Added MicroMipsR6Inst16 class for 16-bit instructions.
Classes changed so they inherit from MicroMipsR6Inst16 (PredicateControl) in MicroMips32r6InstrInfo.td. 
Subsets of PredicateControl used instead of the Predicates list.
Added ISA_MICROMIPS and used instead of Predicates in MicroMipsInstrInfo.td.


http://reviews.llvm.org/D11181

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  lib/Target/Mips/MicroMips32r6InstrFormats.td
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/MipsInstrInfo.td
  test/MC/Disassembler/Mips/micromips32r6.txt
  test/MC/Disassembler/Mips/micromips64r6.txt
  test/MC/Mips/micromips32r6/invalid.s
  test/MC/Mips/micromips32r6/valid.s
  test/MC/Mips/micromips64r6/invalid.s
  test/MC/Mips/micromips64r6/valid.s

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