[llvm] r245640 - AArch64: Do not create CCMP on multiple users.

Ahmed Bougacha via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 20 16:36:06 PDT 2015


On Thu, Aug 20, 2015 at 4:33 PM, Matthias Braun via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: matze
> Date: Thu Aug 20 18:33:31 2015
> New Revision: 245640
>
> URL: http://llvm.org/viewvc/llvm-project?rev=245640&view=rev
> Log:
> AArch64: Do not create CCMP on multiple users.
>
> Create CMP;CCMP sequences from and/or trees does not gain us anything if
> the and/or tree is materialized to a GP register anyway. While most of
> the code already checked for hasOneUse() there was one important case
> missing.
>
> Modified:
>     llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
>     llvm/trunk/test/CodeGen/AArch64/arm64-ccmp.ll
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=245640&r1=245639&r2=245640&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Thu Aug 20
> 18:33:31 2015
> @@ -1349,7 +1349,7 @@ static SDValue emitConjunctionDisjunctio
>      unsigned NZCV = AArch64CC::getNZCVToSatisfyCondCode(InvOutCC);
>      return emitConditionalComparison(LHS, RHS, CC, CCOp, ConditionOp,
> NZCV, DL,
>                                       DAG);
> -  } else if (Opcode != ISD::AND && Opcode != ISD::OR)
> +  } else if ((Opcode != ISD::AND && Opcode != ISD::OR) ||
> !Val->hasOneUse())
>      return SDValue();
>
>    assert((Opcode == ISD::OR || !PushNegate)
>
> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-ccmp.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-ccmp.ll?rev=245640&r1=245639&r2=245640&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/arm64-ccmp.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/arm64-ccmp.ll Thu Aug 20 18:33:31 2015
> @@ -373,8 +373,8 @@ define i32 @select_ororand(i32 %w0, i32
>    ret i32 %sel
>  }
>
> -; CHECK-LABEL: select_noccmp
> -define i64 @select_noccmp(i64 %v1, i64 %v2, i64 %v3, i64 %r) {
> +; CHECK-LABEL: select_noccmp1
> +define i64 @select_noccmp1(i64 %v1, i64 %v2, i64 %v3, i64 %r) {
>  ; CHECK-NOT: CCMP
>

Should this be lowercase "ccmp" ?

-Ahmed


>    %c0 = icmp slt i64 %v1, 0
>    %c1 = icmp sgt i64 %v1, 13
> @@ -386,3 +386,19 @@ define i64 @select_noccmp(i64 %v1, i64 %
>    %sel = select i1 %or, i64 0, i64 %r
>    ret i64 %sel
>  }
> +
> + at g = global i32 0
> +
> +; Should not use ccmp if we have to compute the or expression in an
> integer
> +; register anyway because of other users.
> +; CHECK-LABEL: select_noccmp2
> +define i64 @select_noccmp2(i64 %v1, i64 %v2, i64 %v3, i64 %r) {
> +; CHECK-NOT: CCMP
> +  %c0 = icmp slt i64 %v1, 0
> +  %c1 = icmp sgt i64 %v1, 13
> +  %or = or i1 %c0, %c1
> +  %sel = select i1 %or, i64 0, i64 %r
> +  %ext = sext i1 %or to i32
> +  store volatile i32 %ext, i32* @g
> +  ret i64 %sel
> +}
>
>
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