[PATCH] D11973: AVX512 : kadd implemantation

[Igor Breger via llvm-commits]

igorb created this revision.
igorb added reviewers: delena, AsafBadouh.
igorb added a subscriber: llvm-commits.
igorb set the repository for this revision to rL LLVM.

AVX512: kadd implemantation
Added tests for encoding.

Repository:
  rL LLVM

http://reviews.llvm.org/D11973

Files:
  lib/Target/X86/X86InstrAVX512.td
  test/MC/X86/x86-64-avx512bw.s
  test/MC/X86/x86-64-avx512dq.s

Index: test/MC/X86/x86-64-avx512dq.s
===================================================================
--- test/MC/X86/x86-64-avx512dq.s
+++ test/MC/X86/x86-64-avx512dq.s
@@ -2371,3 +2371,19 @@
 // CHECK:  encoding: [0x62,0xa1,0xff,0xca,0x7a,0xd5]
           vcvtuqq2ps %zmm21, %ymm18 {%k2} {z}
 
+// CHECK: kaddb  %k7, %k4, %k5
+// CHECK:  encoding: [0xc5,0xdd,0x4a,0xef]
+          kaddb  %k7, %k4, %k5
+
+// CHECK: kaddb  %k4, %k6, %k5
+// CHECK:  encoding: [0xc5,0xcd,0x4a,0xec]
+          kaddb  %k4, %k6, %k5
+
+// CHECK: kaddw  %k4, %k3, %k2
+// CHECK:  encoding: [0xc5,0xe4,0x4a,0xd4]
+          kaddw  %k4, %k3, %k2
+
+// CHECK: kaddw  %k6, %k6, %k2
+// CHECK:  encoding: [0xc5,0xcc,0x4a,0xd6]
+          kaddw  %k6, %k6, %k2
+
Index: test/MC/X86/x86-64-avx512bw.s
===================================================================
--- test/MC/X86/x86-64-avx512bw.s
+++ test/MC/X86/x86-64-avx512bw.s
@@ -4112,3 +4112,11 @@
 // CHECK:  encoding: [0x62,0x61,0x2d,0x40,0x69,0xb2,0xc0,0xdf,0xff,0xff]
           vpunpckhwd -8256(%rdx), %zmm26, %zmm30
 
+// CHECK: kaddd  %k6, %k6, %k2
+// CHECK:  encoding: [0xc4,0xe1,0xcd,0x4a,0xd6]
+          kaddd  %k6, %k6, %k2
+
+// CHECK: kaddq  %k4, %k6, %k3
+// CHECK:  encoding: [0xc4,0xe1,0xcc,0x4a,0xdc]
+          kaddq  %k4, %k6, %k3
+
Index: lib/Target/X86/X86InstrAVX512.td
===================================================================
--- lib/Target/X86/X86InstrAVX512.td
+++ lib/Target/X86/X86InstrAVX512.td
@@ -1955,11 +1955,12 @@
 }
 
 multiclass avx512_mask_binop_all<bits<8> opc, string OpcodeStr,
-                               SDPatternOperator OpNode, bit IsCommutable> {
+                               SDPatternOperator OpNode, bit IsCommutable,
+                               Predicate prdW = HasAVX512> {
   defm B : avx512_mask_binop<opc, !strconcat(OpcodeStr, "b"), VK8, OpNode,
                              HasDQI, IsCommutable>, VEX_4V, VEX_L, PD;
   defm W : avx512_mask_binop<opc, !strconcat(OpcodeStr, "w"), VK16, OpNode,
-                             HasAVX512, IsCommutable>, VEX_4V, VEX_L, PS;
+                             prdW, IsCommutable>, VEX_4V, VEX_L, PS;
   defm D : avx512_mask_binop<opc, !strconcat(OpcodeStr, "d"), VK32, OpNode,
                              HasBWI, IsCommutable>, VEX_4V, VEX_L, VEX_W, PD;
   defm Q : avx512_mask_binop<opc, !strconcat(OpcodeStr, "q"), VK64, OpNode,
@@ -1974,6 +1975,7 @@
 defm KXNOR : avx512_mask_binop_all<0x46, "kxnor", xnor, 1>;
 defm KXOR  : avx512_mask_binop_all<0x47, "kxor",  xor,  1>;
 defm KANDN : avx512_mask_binop_all<0x42, "kandn", andn, 0>;
+defm KADD  : avx512_mask_binop_all<0x4A, "kadd",  add,  1, HasDQI>;
 
 multiclass avx512_mask_binop_int<string IntName, string InstName> {
   let Predicates = [HasAVX512] in


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