[llvm] r243536 - AArch64: use AddressingModes.h accessors for compare shifts

Tim Northover tnorthover at apple.com
Wed Jul 29 09:39:56 PDT 2015


Author: tnorthover
Date: Wed Jul 29 11:39:56 2015
New Revision: 243536

URL: http://llvm.org/viewvc/llvm-project?rev=243536&view=rev
Log:
AArch64: use AddressingModes.h accessors for compare shifts

No functional change because "lsl #12" is actually encoded as 12, but one less
bug if someone ever decides to change that for the giggles.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp?rev=243536&r1=243535&r2=243536&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp Wed Jul 29 11:39:56 2015
@@ -59,6 +59,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "AArch64.h"
+#include "MCTargetDesc/AArch64AddressingModes.h"
 #include "llvm/ADT/DepthFirstIterator.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
@@ -153,12 +154,12 @@ MachineInstr *AArch64ConditionOptimizer:
     case AArch64::SUBSXri:
     // cmn is an alias for adds with a dead destination register.
     case AArch64::ADDSWri:
-    case AArch64::ADDSXri:
+    case AArch64::ADDSXri: {
+      unsigned ShiftAmt = AArch64_AM::getShiftValue(I->getOperand(3).getImm());
       if (!I->getOperand(2).isImm()) {
         DEBUG(dbgs() << "Immediate of cmp is symbolic, " << *I << '\n');
         return nullptr;
-      } else if (I->getOperand(2).getImm() << I->getOperand(3).getImm() >=
-                 0xfff) {
+      } else if (I->getOperand(2).getImm() << ShiftAmt >= 0xfff) {
         DEBUG(dbgs() << "Immediate of cmp may be out of range, " << *I << '\n');
         return nullptr;
       } else if (!MRI->use_empty(I->getOperand(0).getReg())) {
@@ -166,7 +167,7 @@ MachineInstr *AArch64ConditionOptimizer:
         return nullptr;
       }
       return I;
-
+    }
     // Prevent false positive case like:
     // cmp      w19, #0
     // cinc     w0, w19, gt





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