[llvm] r242436 - AArch64: Implement conditional compare sequence matching.

[Charlie Turner]

Hi Matthias,

Thanks very much for your fixes. I have confirmed that we get back the
regression Arnaud originally noticed with your attached patches.

I also noticed this fixed the other regression I reported to you in r242723.


Thanks again,
Charlie.

-----Original Message-----
From: llvm-commits-bounces at cs.uiuc.edu
[mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Matthias Braun
Sent: 22 July 2015 22:22
To: Arnaud De Grandmaison
Cc: llvm-commits at cs.uiuc.edu
Subject: Re: [llvm] r242436 - AArch64: Implement conditional compare
sequence matching.

Hi Arnaud,

the attached patches fix the CMP+CSEL behavior for your example. The first
leads to more aggressive select combining, while that is a good thing as a
DAGCombine given recent experiences it would probably be best to actually
benchmark it to make sure we are not unlucky with scheduling/regalloc.

The 2nd patch should always be beneficial but unfortunately the code will
never trigger without the first patch.

Could you run your testsuite again with the two patches applied?

Thanks
	Matthias