[PATCH] AMDGPU: don't match vgpr loads for constant loads
arsenm2 at gmail.com
Sun Jul 26 16:06:31 PDT 2015
> On Jul 26, 2015, at 2:17 PM, David Airlie <airlied at redhat.com> wrote:
>>> On Jul 24, 2015, at 4:15 PM, Marek Olšák <maraeo at gmail.com> wrote:
>>> Hi Matt,
>>> Aren't scalar loads converted to vector loads when the operands are
>> They should be. There are a handful of tests already for this in
>> salu-to-valu.ll, although their check lines aren’t strict enough to show the
>> suboptimal addressing mode matching caused by doing this. Adding one that
>> uses a large maximum mubuf immediate offset (i.e <4096 bytes) but larger
>> than the SMRD offset can handle (256 dwords) that isn’t folded into the
>> mubuf offset would be useful to track this defect.
> So don't these tests do what you asked me to do already, it seems they used tidig.x
> and one adds a value to it.
> This stuff is well beyond my current knowledge of the compiler, I just found what fixed the bug I was seeing in mesa that is blocking us from enabling ARB_gpu_shader5 and subsequently GL4, I'm not sure I have the correct knowledge to write a unit test for some side effects of fixing this bug.
I can take care of it after you commit it. I need to update isLegalAddressingMode to assume SMRD for constant anyway
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