[PATCH] D11408: [ARM/AArch64] - Remove some undefined behaviour when lowering vector shifts

Renato Golin renato.golin at linaro.org
Thu Jul 23 08:27:10 PDT 2015

rengolin added a comment.

In http://reviews.llvm.org/D11408#210737, @LukeCheeseman wrote:

> Thanks for pointing out the unnecessary check prefixes. I haven't added a testcase for the AArch64 backend as it isn't possible to hit the same undefined behaviour as in the ARM backend. The negation is only done in isVShiftRImm when isIntrinsic is true and the only call site in the AArch64 backend passes this as false so the negation isn't performed.

So, why not an an assert for now, and point to the same implementation in ARM mode for when it's needed?



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