[PATCH] D10745: MachineScheduler: Avoid pointless macroop fusion edges.

John Brawn john.brawn at arm.com
Fri Jul 17 10:08:02 PDT 2015


john.brawn added inline comments.

================
Comment at: lib/CodeGen/MachineScheduler.cpp:1362-1382
@@ -1359,1 +1361,23 @@
 
+/// Returns true if \p MI reads a register written by \p Other.
+static bool HasDataDep(const TargetRegisterInfo &TRI, const MachineInstr &MI,
+                       const MachineInstr &Other) {
+  for (const MachineOperand &MO : MI.uses()) {
+    if (!MO.isReg() || !MO.readsReg())
+      continue;
+    unsigned MOReg = MO.getReg();
+
+    for (const MachineOperand &OtherMO : Other.operands()) {
+      if (!OtherMO.isReg() || !OtherMO.isDef())
+        continue;
+      unsigned OtherReg = OtherMO.getReg();
+      if (MOReg == OtherReg ||
+          (TargetRegisterInfo::isPhysicalRegister(MOReg) &&
+           TargetRegisterInfo::isPhysicalRegister(OtherReg) &&
+           TRI.isSuperRegisterEq(MOReg, OtherReg)))
+        return true;
+    }
+  }
+  return false;
+}
+
----------------
MatzeB wrote:
> john.brawn wrote:
> > According to MCInstrDesc.h def operands are always registers, so inverting this to loop over the defs of Other would simplify things. You can also replace the inner loop with MachineInstr::readsRegister, which looks like it does the subregister checking that you want when passed a TargetRegisterInfo.
> Unfortunately MachineInstr::defs() only includes the explicit register defs, there may be additional implicit defs later in the operand list.
Ah, I see. I think you could still use MachineInstr::definesRegister instead of the inner loop though?


Repository:
  rL LLVM

http://reviews.llvm.org/D10745







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