[llvm] r242288 - [PPC] Disassemble little endian ppc instructions in the right byte order

Hans Wennborg hans at chromium.org
Wed Jul 15 13:36:29 PDT 2015


Merged in r242327.

Cheers,
Hans

On Wed, Jul 15, 2015 at 8:39 AM, Hal Finkel <hfinkel at anl.gov> wrote:
> Hi Hans,
>
> This is approved for the release branch.
>
> Thanks again,
> Hal
>
> ----- Original Message -----
>> From: "Benjamin Kramer" <benny.kra at googlemail.com>
>> To: llvm-commits at cs.uiuc.edu
>> Sent: Wednesday, July 15, 2015 7:56:19 AM
>> Subject: [llvm] r242288 - [PPC] Disassemble little endian ppc instructions in the right byte order
>>
>> Author: d0k
>> Date: Wed Jul 15 07:56:19 2015
>> New Revision: 242288
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=242288&view=rev
>> Log:
>> [PPC] Disassemble little endian ppc instructions in the right byte
>> order
>>
>> PR24122. The test is simply a byte swapped version of
>> ppc64-encoding.txt.
>>
>> Added:
>>     llvm/trunk/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt
>> Modified:
>>     llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
>>
>> Modified:
>> llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp?rev=242288&r1=242287&r2=242288&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
>> (original)
>> +++ llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
>> Wed Jul 15 07:56:19 2015
>> @@ -12,6 +12,7 @@
>>  #include "llvm/MC/MCFixedLenDisassembler.h"
>>  #include "llvm/MC/MCInst.h"
>>  #include "llvm/MC/MCSubtargetInfo.h"
>> +#include "llvm/Support/Endian.h"
>>  #include "llvm/Support/TargetRegistry.h"
>>
>>  using namespace llvm;
>> @@ -22,10 +23,12 @@ typedef MCDisassembler::DecodeStatus Dec
>>
>>  namespace {
>>  class PPCDisassembler : public MCDisassembler {
>> +  bool IsLittleEndian;
>> +
>>  public:
>> -  PPCDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
>> -    : MCDisassembler(STI, Ctx) {}
>> -  ~PPCDisassembler() override {}
>> +  PPCDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
>> +                  bool IsLittleEndian)
>> +      : MCDisassembler(STI, Ctx), IsLittleEndian(IsLittleEndian) {}
>>
>>    DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
>>                                ArrayRef<uint8_t> Bytes, uint64_t
>>                                Address,
>> @@ -37,7 +40,13 @@ public:
>>  static MCDisassembler *createPPCDisassembler(const Target &T,
>>                                               const MCSubtargetInfo
>>                                               &STI,
>>                                               MCContext &Ctx) {
>> -  return new PPCDisassembler(STI, Ctx);
>> +  return new PPCDisassembler(STI, Ctx, /*IsLittleEndian=*/false);
>> +}
>> +
>> +static MCDisassembler *createPPCLEDisassembler(const Target &T,
>> +                                               const MCSubtargetInfo
>> &STI,
>> +                                               MCContext &Ctx) {
>> +  return new PPCDisassembler(STI, Ctx, /*IsLittleEndian=*/true);
>>  }
>>
>>  extern "C" void LLVMInitializePowerPCDisassembler() {
>> @@ -47,7 +56,7 @@ extern "C" void LLVMInitializePowerPCDis
>>    TargetRegistry::RegisterMCDisassembler(ThePPC64Target,
>>                                           createPPCDisassembler);
>>    TargetRegistry::RegisterMCDisassembler(ThePPC64LETarget,
>> -                                         createPPCDisassembler);
>> +                                         createPPCLEDisassembler);
>>  }
>>
>>  // FIXME: These can be generated by TableGen from the existing
>>  register
>> @@ -383,9 +392,9 @@ DecodeStatus PPCDisassembler::getInstruc
>>      return MCDisassembler::Fail;
>>    }
>>
>> -  // The instruction is big-endian encoded.
>> -  uint32_t Inst =
>> -      (Bytes[0] << 24) | (Bytes[1] << 16) | (Bytes[2] << 8) |
>> (Bytes[3] << 0);
>> +  // Read the instruction in the proper endianness.
>> +  uint32_t Inst = IsLittleEndian ?
>> support::endian::read32le(Bytes.data())
>> +                                 :
>> support::endian::read32be(Bytes.data());
>>
>>    if (STI.getFeatureBits()[PPC::FeatureQPX]) {
>>      DecodeStatus result =
>>
>> Added: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt?rev=242288&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt
>> (added)
>> +++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt Wed
>> Jul 15 07:56:19 2015
>> @@ -0,0 +1,664 @@
>> +# RUN: llvm-mc --disassemble %s -triple powerpc64le-unknown-unknown
>> -mcpu=pwr7 | FileCheck %s
>> +
>> +# FIXME: test b target
>> +
>> +# FIXME: test ba target
>> +
>> +# FIXME: test bl target
>> +
>> +# FIXME: test bla target
>> +
>> +# FIXME: test bc 4, 10, target
>> +
>> +# FIXME: test bca 4, 10, target
>> +
>> +# FIXME: test bcl 4, 10, target
>> +
>> +# FIXME: test bcla 4, 10, target
>> +
>> +# CHECK: bclr 4, 10, 3
>> +0x20 0x18 0x8a 0x4c
>> +
>> +# CHECK: bclr 4, 10
>> +0x20 0x00 0x8a 0x4c
>> +
>> +# CHECK: bclrl 4, 10, 3
>> +0x21 0x18 0x8a 0x4c
>> +
>> +# CHECK: bclrl 4, 10
>> +0x21 0x00 0x8a 0x4c
>> +
>> +# CHECK: bcctr 4, 10, 3
>> +0x20 0x1c 0x8a 0x4c
>> +
>> +# CHECK: bcctr 4, 10
>> +0x20 0x04 0x8a 0x4c
>> +
>> +# CHECK: bcctrl 4, 10, 3
>> +0x21 0x1c 0x8a 0x4c
>> +
>> +# CHECK: bcctrl 4, 10
>> +0x21 0x04 0x8a 0x4c
>> +
>> +# CHECK: crand 2, 3, 4
>> +0x02 0x22 0x43 0x4c
>> +
>> +# CHECK: crnand 2, 3, 4
>> +0xc2 0x21 0x43 0x4c
>> +
>> +# CHECK: cror 2, 3, 4
>> +0x82 0x23 0x43 0x4c
>> +
>> +# CHECK: crxor 2, 3, 4
>> +0x82 0x21 0x43 0x4c
>> +
>> +# CHECK: crnor 2, 3, 4
>> +0x42 0x20 0x43 0x4c
>> +
>> +# CHECK: creqv 2, 3, 4
>> +0x42 0x22 0x43 0x4c
>> +
>> +# CHECK: crandc 2, 3, 4
>> +0x02 0x21 0x43 0x4c
>> +
>> +# CHECK: crorc 2, 3, 4
>> +0x42 0x23 0x43 0x4c
>> +
>> +# CHECK: mcrf 2, 3
>> +0x00 0x00 0x0c 0x4d
>> +
>> +# CHECK: sc 1
>> +0x22 0x00 0x00 0x44
>> +
>> +# CHECK: sc
>> +0x02 0x00 0x00 0x44
>> +
>> +# CHECK: clrbhrb
>> +0x5c 0x03 0x00 0x7c
>> +
>> +# CHECK: mfbhrbe 9, 983
>> +0x5c 0xba 0x3e 0x7d
>> +
>> +# CHECK: rfebb 1
>> +0x24 0x09 0x00 0x4c
>> +
>> +# CHECK: lbz 2, 128(4)
>> +0x80 0x00 0x44 0x88
>> +
>> +# CHECK: lbzx 2, 3, 4
>> +0xae 0x20 0x43 0x7c
>> +
>> +# CHECK: lbzu 2, 128(4)
>> +0x80 0x00 0x44 0x8c
>> +
>> +# CHECK: lbzux 2, 3, 4
>> +0xee 0x20 0x43 0x7c
>> +
>> +# CHECK: lhz 2, 128(4)
>> +0x80 0x00 0x44 0xa0
>> +
>> +# CHECK: lhzx 2, 3, 4
>> +0x2e 0x22 0x43 0x7c
>> +
>> +# CHECK: lhzu 2, 128(4)
>> +0x80 0x00 0x44 0xa4
>> +
>> +# CHECK: lhzux 2, 3, 4
>> +0x6e 0x22 0x43 0x7c
>> +
>> +# CHECK: lha 2, 128(4)
>> +0x80 0x00 0x44 0xa8
>> +
>> +# CHECK: lhax 2, 3, 4
>> +0xae 0x22 0x43 0x7c
>> +
>> +# CHECK: lhau 2, 128(4)
>> +0x80 0x00 0x44 0xac
>> +
>> +# CHECK: lhaux 2, 3, 4
>> +0xee 0x22 0x43 0x7c
>> +
>> +# CHECK: lwz 2, 128(4)
>> +0x80 0x00 0x44 0x80
>> +
>> +# CHECK: lwzx 2, 3, 4
>> +0x2e 0x20 0x43 0x7c
>> +
>> +# CHECK: lwzu 2, 128(4)
>> +0x80 0x00 0x44 0x84
>> +
>> +# CHECK: lwzux 2, 3, 4
>> +0x6e 0x20 0x43 0x7c
>> +
>> +# CHECK: lwa 2, 128(4)
>> +0x82 0x00 0x44 0xe8
>> +
>> +# CHECK: lwax 2, 3, 4
>> +0xaa 0x22 0x43 0x7c
>> +
>> +# CHECK: lwaux 2, 3, 4
>> +0xea 0x22 0x43 0x7c
>> +
>> +# CHECK: ld 2, 128(4)
>> +0x80 0x00 0x44 0xe8
>> +
>> +# CHECK: ldx 2, 3, 4
>> +0x2a 0x20 0x43 0x7c
>> +
>> +# CHECK: ldu 2, 128(4)
>> +0x81 0x00 0x44 0xe8
>> +
>> +# CHECK: ldux 2, 3, 4
>> +0x6a 0x20 0x43 0x7c
>> +
>> +# CHECK: stb 2, 128(4)
>> +0x80 0x00 0x44 0x98
>> +
>> +# CHECK: stbx 2, 3, 4
>> +0xae 0x21 0x43 0x7c
>> +
>> +# CHECK: stbu 2, 128(4)
>> +0x80 0x00 0x44 0x9c
>> +
>> +# CHECK: stbux 2, 3, 4
>> +0xee 0x21 0x43 0x7c
>> +
>> +# CHECK: sth 2, 128(4)
>> +0x80 0x00 0x44 0xb0
>> +
>> +# CHECK: sthx 2, 3, 4
>> +0x2e 0x23 0x43 0x7c
>> +
>> +# CHECK: sthu 2, 128(4)
>> +0x80 0x00 0x44 0xb4
>> +
>> +# CHECK: sthux 2, 3, 4
>> +0x6e 0x23 0x43 0x7c
>> +
>> +# CHECK: stw 2, 128(4)
>> +0x80 0x00 0x44 0x90
>> +
>> +# CHECK: stwx 2, 3, 4
>> +0x2e 0x21 0x43 0x7c
>> +
>> +# CHECK: stwu 2, 128(4)
>> +0x80 0x00 0x44 0x94
>> +
>> +# CHECK: stwux 2, 3, 4
>> +0x6e 0x21 0x43 0x7c
>> +
>> +# CHECK: std 2, 128(4)
>> +0x80 0x00 0x44 0xf8
>> +
>> +# CHECK: stdx 2, 3, 4
>> +0x2a 0x21 0x43 0x7c
>> +
>> +# CHECK: stdu 2, 128(4)
>> +0x81 0x00 0x44 0xf8
>> +
>> +# CHECK: stdux 2, 3, 4
>> +0x6a 0x21 0x43 0x7c
>> +
>> +# CHECK: lhbrx 2, 3, 4
>> +0x2c 0x26 0x43 0x7c
>> +
>> +# CHECK: sthbrx 2, 3, 4
>> +0x2c 0x27 0x43 0x7c
>> +
>> +# CHECK: lwbrx 2, 3, 4
>> +0x2c 0x24 0x43 0x7c
>> +
>> +# CHECK: stwbrx 2, 3, 4
>> +0x2c 0x25 0x43 0x7c
>> +
>> +# CHECK: ldbrx 2, 3, 4
>> +0x28 0x24 0x43 0x7c
>> +
>> +# CHECK: stdbrx 2, 3, 4
>> +0x28 0x25 0x43 0x7c
>> +
>> +# CHECK: lmw 2, 128(1)
>> +0x80 0x00 0x41 0xb8
>> +
>> +# CHECK: stmw 2, 128(1)
>> +0x80 0x00 0x41 0xbc
>> +
>> +# CHECK: addi 2, 3, 128
>> +0x80 0x00 0x43 0x38
>> +
>> +# CHECK: addis 2, 3, 128
>> +0x80 0x00 0x43 0x3c
>> +
>> +# CHECK: add 2, 3, 4
>> +0x14 0x22 0x43 0x7c
>> +
>> +# CHECK: add. 2, 3, 4
>> +0x15 0x22 0x43 0x7c
>> +
>> +# CHECK: subf 2, 3, 4
>> +0x50 0x20 0x43 0x7c
>> +
>> +# CHECK: subf. 2, 3, 4
>> +0x51 0x20 0x43 0x7c
>> +
>> +# CHECK: addic 2, 3, 128
>> +0x80 0x00 0x43 0x30
>> +
>> +# CHECK: addic. 2, 3, 128
>> +0x80 0x00 0x43 0x34
>> +
>> +# CHECK: subfic 2, 3, 4
>> +0x04 0x00 0x43 0x20
>> +
>> +# CHECK: addc 2, 3, 4
>> +0x14 0x20 0x43 0x7c
>> +
>> +# CHECK: addc. 2, 3, 4
>> +0x15 0x20 0x43 0x7c
>> +
>> +# CHECK: subfc 2, 3, 4
>> +0x10 0x20 0x43 0x7c
>> +
>> +# CHECK: subfc 2, 3, 4
>> +0x10 0x20 0x43 0x7c
>> +
>> +# CHECK: adde 2, 3, 4
>> +0x14 0x21 0x43 0x7c
>> +
>> +# CHECK: adde. 2, 3, 4
>> +0x15 0x21 0x43 0x7c
>> +
>> +# CHECK: subfe 2, 3, 4
>> +0x10 0x21 0x43 0x7c
>> +
>> +# CHECK: subfe. 2, 3, 4
>> +0x11 0x21 0x43 0x7c
>> +
>> +# CHECK: addme 2, 3
>> +0xd4 0x01 0x43 0x7c
>> +
>> +# CHECK: addme. 2, 3
>> +0xd5 0x01 0x43 0x7c
>> +
>> +# CHECK: subfme 2, 3
>> +0xd0 0x01 0x43 0x7c
>> +
>> +# CHECK: subfme. 2, 3
>> +0xd1 0x01 0x43 0x7c
>> +
>> +# CHECK: addze 2, 3
>> +0x94 0x01 0x43 0x7c
>> +
>> +# CHECK: addze. 2, 3
>> +0x95 0x01 0x43 0x7c
>> +
>> +# CHECK: subfze 2, 3
>> +0x90 0x01 0x43 0x7c
>> +
>> +# CHECK: subfze. 2, 3
>> +0x91 0x01 0x43 0x7c
>> +
>> +# CHECK: neg 2, 3
>> +0xd0 0x00 0x43 0x7c
>> +
>> +# CHECK: neg. 2, 3
>> +0xd1 0x00 0x43 0x7c
>> +
>> +# CHECK: mulli 2, 3, 128
>> +0x80 0x00 0x43 0x1c
>> +
>> +# CHECK: mulhw 2, 3, 4
>> +0x96 0x20 0x43 0x7c
>> +
>> +# CHECK: mulhw. 2, 3, 4
>> +0x97 0x20 0x43 0x7c
>> +
>> +# CHECK: mullw 2, 3, 4
>> +0xd6 0x21 0x43 0x7c
>> +
>> +# CHECK: mullw. 2, 3, 4
>> +0xd7 0x21 0x43 0x7c
>> +
>> +# CHECK: mulhwu 2, 3, 4
>> +0x16 0x20 0x43 0x7c
>> +
>> +# CHECK: mulhwu. 2, 3, 4
>> +0x17 0x20 0x43 0x7c
>> +
>> +# CHECK: divw 2, 3, 4
>> +0xd6 0x23 0x43 0x7c
>> +
>> +# CHECK: divw. 2, 3, 4
>> +0xd7 0x23 0x43 0x7c
>> +
>> +# CHECK: divwu 2, 3, 4
>> +0x96 0x23 0x43 0x7c
>> +
>> +# CHECK: divwu. 2, 3, 4
>> +0x97 0x23 0x43 0x7c
>> +
>> +# CHECK: divwe 2, 3, 4
>> +0x56 0x23 0x43 0x7c
>> +
>> +# CHECK: divwe. 2, 3, 4
>> +0x57 0x23 0x43 0x7c
>> +
>> +# CHECK: divweu 2, 3, 4
>> +0x16 0x23 0x43 0x7c
>> +
>> +# CHECK: divweu. 2, 3, 4
>> +0x17 0x23 0x43 0x7c
>> +
>> +# CHECK: mulld 2, 3, 4
>> +0xd2 0x21 0x43 0x7c
>> +
>> +# CHECK: mulld. 2, 3, 4
>> +0xd3 0x21 0x43 0x7c
>> +
>> +# CHECK: mulhd 2, 3, 4
>> +0x92 0x20 0x43 0x7c
>> +
>> +# CHECK: mulhd. 2, 3, 4
>> +0x93 0x20 0x43 0x7c
>> +
>> +# CHECK: mulhdu 2, 3, 4
>> +0x12 0x20 0x43 0x7c
>> +
>> +# CHECK: mulhdu. 2, 3, 4
>> +0x13 0x20 0x43 0x7c
>> +
>> +# CHECK: divd 2, 3, 4
>> +0xd2 0x23 0x43 0x7c
>> +
>> +# CHECK: divd. 2, 3, 4
>> +0xd3 0x23 0x43 0x7c
>> +
>> +# CHECK: divdu 2, 3, 4
>> +0x92 0x23 0x43 0x7c
>> +
>> +# CHECK: divdu. 2, 3, 4
>> +0x93 0x23 0x43 0x7c
>> +
>> +# CHECK: divde 2, 3, 4
>> +0x52 0x23 0x43 0x7c
>> +
>> +# CHECK: divde. 2, 3, 4
>> +0x53 0x23 0x43 0x7c
>> +
>> +# CHECK: divdeu 2, 3, 4
>> +0x12 0x23 0x43 0x7c
>> +
>> +# CHECK: divdeu. 2, 3, 4
>> +0x13 0x23 0x43 0x7c
>> +
>> +# CHECK: cmpdi 2, 3, 128
>> +0x80 0x00 0x23 0x2d
>> +
>> +# CHECK: cmpd 2, 3, 4
>> +0x00 0x20 0x23 0x7d
>> +
>> +# CHECK: cmpldi 2, 3, 128
>> +0x80 0x00 0x23 0x29
>> +
>> +# CHECK: cmpld 2, 3, 4
>> +0x40 0x20 0x23 0x7d
>> +
>> +# CHECK: cmpwi 2, 3, 128
>> +0x80 0x00 0x03 0x2d
>> +
>> +# CHECK: cmpw 2, 3, 4
>> +0x00 0x20 0x03 0x7d
>> +
>> +# CHECK: cmplwi 2, 3, 128
>> +0x80 0x00 0x03 0x29
>> +
>> +# CHECK: cmplw 2, 3, 4
>> +0x40 0x20 0x03 0x7d
>> +
>> +# CHECK: twllti 3, 4
>> +0x04 0x00 0x43 0x0c
>> +
>> +# CHECK: twllt 3, 4
>> +0x08 0x20 0x43 0x7c
>> +
>> +# CHECK: tdllti 3, 4
>> +0x04 0x00 0x43 0x08
>> +
>> +# CHECK: tdllt 3, 4
>> +0x88 0x20 0x43 0x7c
>> +
>> +# CHECK: isel 2, 3, 4, 5
>> +0x5e 0x21 0x43 0x7c
>> +
>> +# CHECK: andi. 2, 3, 128
>> +0x80 0x00 0x62 0x70
>> +
>> +# CHECK: andis. 2, 3, 128
>> +0x80 0x00 0x62 0x74
>> +
>> +# CHECK: ori 2, 3, 128
>> +0x80 0x00 0x62 0x60
>> +
>> +# CHECK: oris 2, 3, 128
>> +0x80 0x00 0x62 0x64
>> +
>> +# CHECK: xori 2, 3, 128
>> +0x80 0x00 0x62 0x68
>> +
>> +# CHECK: xoris 2, 3, 128
>> +0x80 0x00 0x62 0x6c
>> +
>> +# CHECK: and 2, 3, 4
>> +0x38 0x20 0x62 0x7c
>> +
>> +# CHECK: and. 2, 3, 4
>> +0x39 0x20 0x62 0x7c
>> +
>> +# CHECK: xor 2, 3, 4
>> +0x78 0x22 0x62 0x7c
>> +
>> +# CHECK: xor. 2, 3, 4
>> +0x79 0x22 0x62 0x7c
>> +
>> +# CHECK: nand 2, 3, 4
>> +0xb8 0x23 0x62 0x7c
>> +
>> +# CHECK: nand. 2, 3, 4
>> +0xb9 0x23 0x62 0x7c
>> +
>> +# CHECK: or 2, 3, 4
>> +0x78 0x23 0x62 0x7c
>> +
>> +# CHECK: or. 2, 3, 4
>> +0x79 0x23 0x62 0x7c
>> +
>> +# CHECK: nor 2, 3, 4
>> +0xf8 0x20 0x62 0x7c
>> +
>> +# CHECK: nor. 2, 3, 4
>> +0xf9 0x20 0x62 0x7c
>> +
>> +# CHECK: eqv 2, 3, 4
>> +0x38 0x22 0x62 0x7c
>> +
>> +# CHECK: eqv. 2, 3, 4
>> +0x39 0x22 0x62 0x7c
>> +
>> +# CHECK: andc 2, 3, 4
>> +0x78 0x20 0x62 0x7c
>> +
>> +# CHECK: andc. 2, 3, 4
>> +0x79 0x20 0x62 0x7c
>> +
>> +# CHECK: orc 2, 3, 4
>> +0x38 0x23 0x62 0x7c
>> +
>> +# CHECK: orc. 2, 3, 4
>> +0x39 0x23 0x62 0x7c
>> +
>> +# CHECK: extsb 2, 3
>> +0x74 0x07 0x62 0x7c
>> +
>> +# CHECK: extsb. 2, 3
>> +0x75 0x07 0x62 0x7c
>> +
>> +# CHECK: extsh 2, 3
>> +0x34 0x07 0x62 0x7c
>> +
>> +# CHECK: extsh. 2, 3
>> +0x35 0x07 0x62 0x7c
>> +
>> +# CHECK: cntlz 2, 3
>> +0x34 0x00 0x62 0x7c
>> +
>> +# CHECK: cntlz. 2, 3
>> +0x35 0x00 0x62 0x7c
>> +
>> +# CHECK: popcntw 2, 3
>> +0xf4 0x02 0x62 0x7c
>> +
>> +# CHECK: extsw 2, 3
>> +0xb4 0x07 0x62 0x7c
>> +
>> +# CHECK: extsw. 2, 3
>> +0xb5 0x07 0x62 0x7c
>> +
>> +# CHECK: cntlzd 2, 3
>> +0x74 0x00 0x62 0x7c
>> +
>> +# CHECK: cntlzd. 2, 3
>> +0x75 0x00 0x62 0x7c
>> +
>> +# CHECK: popcntd 2, 3
>> +0xf4 0x03 0x62 0x7c
>> +
>> +# CHECK: bpermd 2, 3, 4
>> +0xf8 0x21 0x62 0x7c
>> +
>> +# CHECK: cmpb 7, 21, 4
>> +0xf8 0x23 0xa7 0x7e
>> +
>> +# CHECK: rlwinm 2, 3, 4, 5, 6
>> +0x4c 0x21 0x62 0x54
>> +
>> +# CHECK: rlwinm. 2, 3, 4, 5, 6
>> +0x4d 0x21 0x62 0x54
>> +
>> +# CHECK: rlwnm 2, 3, 4, 5, 6
>> +0x4c 0x21 0x62 0x5c
>> +
>> +# CHECK: rlwnm. 2, 3, 4, 5, 6
>> +0x4d 0x21 0x62 0x5c
>> +
>> +# CHECK: rlwimi 2, 3, 4, 5, 6
>> +0x4c 0x21 0x62 0x50
>> +
>> +# CHECK: rlwimi. 2, 3, 4, 5, 6
>> +0x4d 0x21 0x62 0x50
>> +
>> +# CHECK: rldicl 2, 3, 4, 5
>> +0x40 0x21 0x62 0x78
>> +
>> +# CHECK: rldicl. 2, 3, 4, 5
>> +0x41 0x21 0x62 0x78
>> +
>> +# CHECK: rldicr 2, 3, 4, 5
>> +0x44 0x21 0x62 0x78
>> +
>> +# CHECK: rldicr. 2, 3, 4, 5
>> +0x45 0x21 0x62 0x78
>> +
>> +# CHECK: rldic 2, 3, 4, 5
>> +0x48 0x21 0x62 0x78
>> +
>> +# CHECK: rldic. 2, 3, 4, 5
>> +0x49 0x21 0x62 0x78
>> +
>> +# CHECK: rldcl 2, 3, 4, 5
>> +0x50 0x21 0x62 0x78
>> +
>> +# CHECK: rldcl. 2, 3, 4, 5
>> +0x51 0x21 0x62 0x78
>> +
>> +# CHECK: rldcr 2, 3, 4, 5
>> +0x52 0x21 0x62 0x78
>> +
>> +# CHECK: rldcr. 2, 3, 4, 5
>> +0x53 0x21 0x62 0x78
>> +
>> +# CHECK: rldimi 2, 3, 4, 5
>> +0x4c 0x21 0x62 0x78
>> +
>> +# CHECK: rldimi. 2, 3, 4, 5
>> +0x4d 0x21 0x62 0x78
>> +
>> +# CHECK: slw 2, 3, 4
>> +0x30 0x20 0x62 0x7c
>> +
>> +# CHECK: slw. 2, 3, 4
>> +0x31 0x20 0x62 0x7c
>> +
>> +# CHECK: srw 2, 3, 4
>> +0x30 0x24 0x62 0x7c
>> +
>> +# CHECK: srw. 2, 3, 4
>> +0x31 0x24 0x62 0x7c
>> +
>> +# CHECK: srawi 2, 3, 4
>> +0x70 0x26 0x62 0x7c
>> +
>> +# CHECK: srawi. 2, 3, 4
>> +0x71 0x26 0x62 0x7c
>> +
>> +# CHECK: sraw 2, 3, 4
>> +0x30 0x26 0x62 0x7c
>> +
>> +# CHECK: sraw. 2, 3, 4
>> +0x31 0x26 0x62 0x7c
>> +
>> +# CHECK: sld 2, 3, 4
>> +0x36 0x20 0x62 0x7c
>> +
>> +# CHECK: sld. 2, 3, 4
>> +0x37 0x20 0x62 0x7c
>> +
>> +# CHECK: srd 2, 3, 4
>> +0x36 0x24 0x62 0x7c
>> +
>> +# CHECK: srd. 2, 3, 4
>> +0x37 0x24 0x62 0x7c
>> +
>> +# CHECK: sradi 2, 3, 4
>> +0x74 0x26 0x62 0x7c
>> +
>> +# CHECK: sradi. 2, 3, 4
>> +0x75 0x26 0x62 0x7c
>> +
>> +# CHECK: srad 2, 3, 4
>> +0x34 0x26 0x62 0x7c
>> +
>> +# CHECK: srad. 2, 3, 4
>> +0x35 0x26 0x62 0x7c
>> +
>> +# CHECK: mtspr 600, 2
>> +0xa6 0x93 0x58 0x7c
>> +
>> +# CHECK: mfspr 2, 600
>> +0xa6 0x92 0x58 0x7c
>> +
>> +# CHECK: mtcrf 123, 2
>> +0x20 0xb1 0x47 0x7c
>> +
>> +# CHECK: mfcr 2
>> +0x26 0x00 0x40 0x7c
>> +
>> +# CHECK: mtocrf 16, 2
>> +0x20 0x01 0x51 0x7c
>> +
>> +# CHECK: mfocrf 16, 8
>> +0x26 0x80 0x10 0x7e
>> +
>> +# CHECK: mtsrin 10, 12
>> +0xe4 0x61 0x40 0x7d
>> +# CHECK: mfsrin 10, 12
>> +0x26 0x65 0x40 0x7d
>>
>>
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>>
>
> --
> Hal Finkel
> Assistant Computational Scientist
> Leadership Computing Facility
> Argonne National Laboratory



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