[lld] r242014 - [Mips] Support MIPS big-endian 32/64-bits targets
Simon Atanasyan
simon at atanasyan.com
Mon Jul 13 02:11:35 PDT 2015
Author: atanasyan
Date: Mon Jul 13 04:11:35 2015
New Revision: 242014
URL: http://llvm.org/viewvc/llvm-project?rev=242014&view=rev
Log:
[Mips] Support MIPS big-endian 32/64-bits targets
Added:
lld/trunk/test/elf/Mips/exe-fileheader-be-64.test
lld/trunk/test/elf/Mips/exe-fileheader-be.test
lld/trunk/test/elf/Mips/la25-stub-be.test
lld/trunk/test/elf/Mips/la25-stub-micro-be.test
lld/trunk/test/elf/Mips/plt-entry-r6-be.test
lld/trunk/test/elf/Mips/plt-header-be.test
lld/trunk/test/elf/Mips/plt-header-micro-be.test
lld/trunk/test/elf/Mips/rel-32-be.test
Modified:
lld/trunk/lib/Driver/GnuLdDriver.cpp
lld/trunk/lib/ReaderWriter/ELF/ELFLinkingContext.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsAbiInfoHandler.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFFile.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFWriters.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsLinkingContext.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.h
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsSectionChunks.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetHandler.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetLayout.cpp
Modified: lld/trunk/lib/Driver/GnuLdDriver.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/Driver/GnuLdDriver.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/Driver/GnuLdDriver.cpp (original)
+++ lld/trunk/lib/Driver/GnuLdDriver.cpp Mon Jul 13 04:11:35 2015
@@ -164,6 +164,13 @@ getArchType(const llvm::Triple &triple,
if (value == "elf_x86_64")
return llvm::Triple::x86_64;
return llvm::None;
+ case llvm::Triple::mips:
+ case llvm::Triple::mips64:
+ if (value == "elf32btsmip")
+ return llvm::Triple::mips;
+ if (value == "elf64btsmip")
+ return llvm::Triple::mips64;
+ return llvm::None;
case llvm::Triple::mipsel:
case llvm::Triple::mips64el:
if (value == "elf32ltsmip")
Modified: lld/trunk/lib/ReaderWriter/ELF/ELFLinkingContext.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/ELFLinkingContext.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/ELFLinkingContext.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/ELFLinkingContext.cpp Mon Jul 13 04:11:35 2015
@@ -52,7 +52,9 @@ uint16_t ELFLinkingContext::getOutputMac
return llvm::ELF::EM_X86_64;
case llvm::Triple::hexagon:
return llvm::ELF::EM_HEXAGON;
+ case llvm::Triple::mips:
case llvm::Triple::mipsel:
+ case llvm::Triple::mips64:
case llvm::Triple::mips64el:
return llvm::ELF::EM_MIPS;
case llvm::Triple::aarch64:
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsAbiInfoHandler.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsAbiInfoHandler.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsAbiInfoHandler.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsAbiInfoHandler.cpp Mon Jul 13 04:11:35 2015
@@ -643,7 +643,9 @@ MipsAbiInfoHandler<ELFT>::createAbiFromS
return abi;
}
+template class MipsAbiInfoHandler<ELF32BE>;
template class MipsAbiInfoHandler<ELF32LE>;
+template class MipsAbiInfoHandler<ELF64BE>;
template class MipsAbiInfoHandler<ELF64LE>;
}
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFFile.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFFile.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFFile.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFFile.cpp Mon Jul 13 04:11:35 2015
@@ -50,7 +50,9 @@ template <class ELFT> bool MipsELFDefine
codeModel() == DefinedAtom::codeMipsPIC;
}
+template class MipsELFDefinedAtom<ELF32BE>;
template class MipsELFDefinedAtom<ELF32LE>;
+template class MipsELFDefinedAtom<ELF64BE>;
template class MipsELFDefinedAtom<ELF64LE>;
template <class ELFT> static bool isMips64EL() {
@@ -78,7 +80,9 @@ MipsELFReference<ELFT>::MipsELFReference
rel.getSymbol(isMips64EL<ELFT>())),
_tag(extractTag(rel)) {}
+template class MipsELFReference<ELF32BE>;
template class MipsELFReference<ELF32LE>;
+template class MipsELFReference<ELF64BE>;
template class MipsELFReference<ELF64LE>;
template <class ELFT>
@@ -270,7 +274,8 @@ template <class ELFT>
Reference::Addend
MipsELFFile<ELFT>::readAddend(const Elf_Rel &ri,
const ArrayRef<uint8_t> content) const {
- return readMipsRelocAddend(getPrimaryType(ri), content.data() + ri.r_offset);
+ return readMipsRelocAddend<ELFT>(getPrimaryType(ri),
+ content.data() + ri.r_offset);
}
template <class ELFT>
@@ -315,7 +320,9 @@ bool MipsELFFile<ELFT>::isLocalBinding(c
->getBinding() == llvm::ELF::STB_LOCAL;
}
+template class MipsELFFile<ELF32BE>;
template class MipsELFFile<ELF32LE>;
+template class MipsELFFile<ELF64BE>;
template class MipsELFFile<ELF64LE>;
} // elf
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFWriters.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFWriters.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFWriters.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsELFWriters.cpp Mon Jul 13 04:11:35 2015
@@ -159,7 +159,9 @@ MipsDynamicLibraryWriter<ELFT>::createDy
this->_alloc) MipsDynamicSymbolTable<ELFT>(this->_ctx, _targetLayout));
}
+template class MipsDynamicLibraryWriter<ELF32BE>;
template class MipsDynamicLibraryWriter<ELF32LE>;
+template class MipsDynamicLibraryWriter<ELF64BE>;
template class MipsDynamicLibraryWriter<ELF64LE>;
template <class ELFT>
@@ -275,7 +277,9 @@ MipsExecutableWriter<ELFT>::createDynami
this->_alloc) MipsDynamicSymbolTable<ELFT>(this->_ctx, _targetLayout));
}
+template class MipsExecutableWriter<ELF32BE>;
template class MipsExecutableWriter<ELF32LE>;
+template class MipsExecutableWriter<ELF64BE>;
template class MipsExecutableWriter<ELF64LE>;
} // elf
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsLinkingContext.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsLinkingContext.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsLinkingContext.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsLinkingContext.cpp Mon Jul 13 04:11:35 2015
@@ -18,7 +18,9 @@ using namespace lld::elf;
std::unique_ptr<ELFLinkingContext>
elf::createMipsLinkingContext(llvm::Triple triple) {
- if (triple.getArch() == llvm::Triple::mipsel ||
+ if (triple.getArch() == llvm::Triple::mips ||
+ triple.getArch() == llvm::Triple::mipsel ||
+ triple.getArch() == llvm::Triple::mips64 ||
triple.getArch() == llvm::Triple::mips64el)
return llvm::make_unique<MipsLinkingContext>(triple);
return nullptr;
@@ -27,8 +29,12 @@ elf::createMipsLinkingContext(llvm::Trip
static std::unique_ptr<TargetHandler> createTarget(llvm::Triple triple,
MipsLinkingContext &ctx) {
switch (triple.getArch()) {
+ case llvm::Triple::mips:
+ return llvm::make_unique<MipsTargetHandler<ELF32BE>>(ctx);
case llvm::Triple::mipsel:
return llvm::make_unique<MipsTargetHandler<ELF32LE>>(ctx);
+ case llvm::Triple::mips64:
+ return llvm::make_unique<MipsTargetHandler<ELF64BE>>(ctx);
case llvm::Triple::mips64el:
return llvm::make_unique<MipsTargetHandler<ELF64LE>>(ctx);
default:
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp Mon Jul 13 04:11:35 2015
@@ -356,11 +356,6 @@ static CrossJumpMode getCrossJumpMode(co
}
}
-static uint64_t microShuffle(uint64_t ins) {
- return (ins & 0xffffffff00000000ull) | ((ins & 0xffff) << 16) |
- ((ins & 0xffff0000) >> 16);
-}
-
static ErrorOr<int64_t> calculateRelocation(Reference::KindValue kind,
Reference::Addend addend,
uint64_t tgtAddr, uint64_t relAddr,
@@ -502,29 +497,32 @@ static ErrorOr<int64_t> calculateRelocat
}
}
+template <class ELFT>
static uint64_t relocRead(const MipsRelocationParams ¶ms,
const uint8_t *loc) {
+ assert((params._size == 4 || params._size == 8) && "Unexpected size");
uint64_t data;
+ memcpy(&data, loc, params._size);
+ if (params._shuffle) {
+ using namespace endian;
+ auto p = reinterpret_cast<const uint8_t *>(&data);
+ uint32_t a = readNext<uint16_t, ELFT::TargetEndianness, unaligned>(p);
+ uint32_t b = read<uint16_t, ELFT::TargetEndianness, unaligned>(p);
+ write<uint32_t, ELFT::TargetEndianness, unaligned>(&data, a << 16 | b);
+ }
switch (params._size) {
case 4:
- data = endian::read32le(loc);
- break;
+ return endian::read<uint32_t, ELFT::TargetEndianness, unaligned>(&data);
case 8:
- data = endian::read64le(loc);
- break;
+ return endian::read<uint64_t, ELFT::TargetEndianness, unaligned>(&data);
default:
llvm_unreachable("Unexpected size");
}
- if (params._shuffle)
- data = microShuffle(data);
- return data;
}
template <class ELFT>
static void relocWrite(uint64_t data, const MipsRelocationParams ¶ms,
uint8_t *loc) {
- if (params._shuffle)
- data = microShuffle(data);
switch (params._size) {
case 4:
endian::write<uint32_t, ELFT::TargetEndianness, unaligned>(loc, data);
@@ -535,6 +533,13 @@ static void relocWrite(uint64_t data, co
default:
llvm_unreachable("Unexpected size");
}
+ if (params._shuffle) {
+ uint32_t v = endian::read<uint32_t, ELFT::TargetEndianness, unaligned>(loc);
+ uint16_t a = v >> 16;
+ uint16_t b = v & 0xffff;
+ endian::write<uint16_t, ELFT::TargetEndianness, unaligned>(loc, a);
+ endian::write<uint16_t, ELFT::TargetEndianness, unaligned>(loc + 2, b);
+ }
}
static uint32_t getRelKind(const Reference &ref, size_t num) {
@@ -604,7 +609,7 @@ std::error_code RelocationHandler<ELFT>:
}
auto params = getRelocationParams(lastRel);
- uint64_t ins = relocRead(params, location);
+ uint64_t ins = relocRead<ELFT>(params, location);
if (auto ec = adjustJumpOpCode(ins, tgtAddr, jumpMode))
return ec;
@@ -619,6 +624,13 @@ namespace elf {
template <>
std::unique_ptr<TargetRelocationHandler>
+createMipsRelocationHandler<ELF32BE>(MipsLinkingContext &ctx,
+ MipsTargetLayout<ELF32BE> &layout) {
+ return llvm::make_unique<RelocationHandler<ELF32BE>>(ctx, layout);
+}
+
+template <>
+std::unique_ptr<TargetRelocationHandler>
createMipsRelocationHandler<ELF32LE>(MipsLinkingContext &ctx,
MipsTargetLayout<ELF32LE> &layout) {
return llvm::make_unique<RelocationHandler<ELF32LE>>(ctx, layout);
@@ -626,15 +638,23 @@ createMipsRelocationHandler<ELF32LE>(Mip
template <>
std::unique_ptr<TargetRelocationHandler>
+createMipsRelocationHandler<ELF64BE>(MipsLinkingContext &ctx,
+ MipsTargetLayout<ELF64BE> &layout) {
+ return llvm::make_unique<RelocationHandler<ELF64BE>>(ctx, layout);
+}
+
+template <>
+std::unique_ptr<TargetRelocationHandler>
createMipsRelocationHandler<ELF64LE>(MipsLinkingContext &ctx,
MipsTargetLayout<ELF64LE> &layout) {
return llvm::make_unique<RelocationHandler<ELF64LE>>(ctx, layout);
}
+template <class ELFT>
Reference::Addend readMipsRelocAddend(Reference::KindValue kind,
const uint8_t *content) {
auto params = getRelocationParams(kind);
- uint64_t ins = relocRead(params, content);
+ uint64_t ins = relocRead<ELFT>(params, content);
int64_t res = (ins & params._mask) << params._shift;
switch (kind) {
case R_MIPS_GPREL16:
@@ -660,5 +680,18 @@ Reference::Addend readMipsRelocAddend(Re
return res;
}
+template
+Reference::Addend readMipsRelocAddend<ELF32BE>(Reference::KindValue kind,
+ const uint8_t *content);
+template
+Reference::Addend readMipsRelocAddend<ELF32LE>(Reference::KindValue kind,
+ const uint8_t *content);
+template
+Reference::Addend readMipsRelocAddend<ELF64BE>(Reference::KindValue kind,
+ const uint8_t *content);
+template
+Reference::Addend readMipsRelocAddend<ELF64LE>(Reference::KindValue kind,
+ const uint8_t *content);
+
} // elf
} // lld
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.h?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.h (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.h Mon Jul 13 04:11:35 2015
@@ -22,6 +22,7 @@ std::unique_ptr<TargetRelocationHandler>
createMipsRelocationHandler(MipsLinkingContext &ctx,
MipsTargetLayout<ELFT> &layout);
+template <class ELFT>
Reference::Addend readMipsRelocAddend(Reference::KindValue kind,
const uint8_t *content);
} // elf
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp Mon Jul 13 04:11:35 2015
@@ -37,8 +37,20 @@ static const uint8_t mipsGotTlsGdAtomCon
0x00, 0x00, 0x00, 0x00
};
-// Regular PLT0 entry
-static const uint8_t mipsPlt0AtomContent[] = {
+// Regular big-endian PLT0 entry
+static const uint8_t mipsBePlt0AtomContent[] = {
+ 0x3c, 0x1c, 0x00, 0x00, // lui $28, %hi(&GOTPLT[0])
+ 0x8f, 0x99, 0x00, 0x00, // lw $25, %lo(&GOTPLT[0])($28)
+ 0x27, 0x9c, 0x00, 0x00, // addiu $28, $28, %lo(&GOTPLT[0])
+ 0x03, 0x1c, 0xc0, 0x23, // subu $24, $24, $28
+ 0x03, 0xe0, 0x78, 0x21, // move $15, $31
+ 0x00, 0x18, 0xc0, 0x82, // srl $24, $24, 2
+ 0x03, 0x20, 0xf8, 0x09, // jalr $25
+ 0x27, 0x18, 0xff, 0xfe // subu $24, $24, 2
+};
+
+// Regular little-endian PLT0 entry
+static const uint8_t mipsLePlt0AtomContent[] = {
0x00, 0x00, 0x1c, 0x3c, // lui $28, %hi(&GOTPLT[0])
0x00, 0x00, 0x99, 0x8f, // lw $25, %lo(&GOTPLT[0])($28)
0x00, 0x00, 0x9c, 0x27, // addiu $28, $28, %lo(&GOTPLT[0])
@@ -49,8 +61,21 @@ static const uint8_t mipsPlt0AtomContent
0xfe, 0xff, 0x18, 0x27 // subu $24, $24, 2
};
-// microMIPS PLT0 entry
-static const uint8_t micromipsPlt0AtomContent[] = {
+// microMIPS big-endian PLT0 entry
+static const uint8_t microMipsBePlt0AtomContent[] = {
+ 0x79, 0x80, 0x00, 0x00, // addiupc $3, (&GOTPLT[0]) - .
+ 0xff, 0x23, 0x00, 0x00, // lw $25, 0($3)
+ 0x05, 0x35, // subu $2, $2, $3
+ 0x25, 0x25, // srl $2, $2, 2
+ 0x33, 0x02, 0xff, 0xfe, // subu $24, $2, 2
+ 0x0d, 0xff, // move $15, $31
+ 0x45, 0xf9, // jalrs $25
+ 0x0f, 0x83, // move $28, $3
+ 0x0c, 0x00 // nop
+};
+
+// microMIPS little-endian PLT0 entry
+static const uint8_t microMipsLePlt0AtomContent[] = {
0x80, 0x79, 0x00, 0x00, // addiupc $3, (&GOTPLT[0]) - .
0x23, 0xff, 0x00, 0x00, // lw $25, 0($3)
0x35, 0x05, // subu $2, $2, $3
@@ -62,40 +87,80 @@ static const uint8_t micromipsPlt0AtomCo
0x00, 0x0c // nop
};
-// Regular PLT entry
-static const uint8_t mipsPltAAtomContent[] = {
+// Regular big-endian PLT entry
+static const uint8_t mipsBePltAAtomContent[] = {
+ 0x3c, 0x0f, 0x00, 0x00, // lui $15, %hi(.got.plt entry)
+ 0x8d, 0xf9, 0x00, 0x00, // l[wd] $25, %lo(.got.plt entry)($15)
+ 0x03, 0x20, 0x00, 0x08, // jr $25
+ 0x25, 0xf8, 0x00, 0x00 // addiu $24, $15, %lo(.got.plt entry)
+};
+
+// Regular little-endian PLT entry
+static const uint8_t mipsLePltAAtomContent[] = {
0x00, 0x00, 0x0f, 0x3c, // lui $15, %hi(.got.plt entry)
0x00, 0x00, 0xf9, 0x8d, // l[wd] $25, %lo(.got.plt entry)($15)
0x08, 0x00, 0x20, 0x03, // jr $25
0x00, 0x00, 0xf8, 0x25 // addiu $24, $15, %lo(.got.plt entry)
};
-// microMIPS PLT entry
-static const uint8_t micromipsPltAtomContent[] = {
+// microMIPS big-endian PLT entry
+static const uint8_t microMipsBePltAAtomContent[] = {
+ 0x79, 0x00, 0x00, 0x00, // addiupc $2, (.got.plt entry) - .
+ 0xff, 0x22, 0x00, 0x00, // lw $25, 0($2)
+ 0x45, 0x99, // jr $25
+ 0x0f, 0x02 // move $24, $2
+};
+
+// microMIPS little-endian PLT entry
+static const uint8_t microMipsLePltAAtomContent[] = {
0x00, 0x79, 0x00, 0x00, // addiupc $2, (.got.plt entry) - .
0x22, 0xff, 0x00, 0x00, // lw $25, 0($2)
0x99, 0x45, // jr $25
0x02, 0x0f // move $24, $2
};
-// R6 PLT entry
-static const uint8_t mipsR6PltAAtomContent[] = {
+// R6 big-endian PLT entry
+static const uint8_t mipsR6BePltAAtomContent[] = {
+ 0x3c, 0x0f, 0x00, 0x00, // lui $15, %hi(.got.plt entry)
+ 0x8d, 0xf9, 0x00, 0x00, // l[wd] $25, %lo(.got.plt entry)($15)
+ 0x03, 0x20, 0x00, 0x09, // jr $25
+ 0x25, 0xf8, 0x00, 0x00 // addiu $24, $15, %lo(.got.plt entry)
+};
+
+// R6 little-endian PLT entry
+static const uint8_t mipsR6LePltAAtomContent[] = {
0x00, 0x00, 0x0f, 0x3c, // lui $15, %hi(.got.plt entry)
0x00, 0x00, 0xf9, 0x8d, // l[wd] $25, %lo(.got.plt entry)($15)
0x09, 0x00, 0x20, 0x03, // jr $25
0x00, 0x00, 0xf8, 0x25 // addiu $24, $15, %lo(.got.plt entry)
};
-// LA25 stub entry
-static const uint8_t mipsLA25AtomContent[] = {
+// LA25 big-endian stub entry
+static const uint8_t mipsBeLA25AtomContent[] = {
+ 0x3c, 0x19, 0x00, 0x00, // lui $25, %hi(func)
+ 0x08, 0x00, 0x00, 0x00, // j func
+ 0x27, 0x39, 0x00, 0x00, // addiu $25, $25, %lo(func)
+ 0x00, 0x00, 0x00, 0x00 // nop
+};
+
+// LA25 little-endian stub entry
+static const uint8_t mipsLeLA25AtomContent[] = {
0x00, 0x00, 0x19, 0x3c, // lui $25, %hi(func)
0x00, 0x00, 0x00, 0x08, // j func
0x00, 0x00, 0x39, 0x27, // addiu $25, $25, %lo(func)
0x00, 0x00, 0x00, 0x00 // nop
};
-// microMIPS LA25 stub entry
-static const uint8_t micromipsLA25AtomContent[] = {
+// microMIPS LA25 big-endian stub entry
+static const uint8_t microMipsBeLA25AtomContent[] = {
+ 0x41, 0xbe, 0x00, 0x00, // lui $25, %hi(func)
+ 0xd4, 0x00, 0x00, 0x00, // j func
+ 0x33, 0x39, 0x00, 0x00, // addiu $25, $25, %lo(func)
+ 0x00, 0x00, 0x00, 0x00 // nop
+};
+
+// microMIPS LA25 little-endian stub entry
+static const uint8_t microMipsLeLA25AtomContent[] = {
0xb9, 0x41, 0x00, 0x00, // lui $25, %hi(func)
0x00, 0xd4, 0x00, 0x00, // j func
0x39, 0x33, 0x00, 0x00, // addiu $25, $25, %lo(func)
@@ -120,9 +185,15 @@ public:
ArrayRef<uint8_t> rawContent() const override;
};
+template <> ArrayRef<uint8_t> GOT0Atom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsGot0AtomContent).slice(4);
+}
template <> ArrayRef<uint8_t> GOT0Atom<ELF32LE>::rawContent() const {
return llvm::makeArrayRef(mipsGot0AtomContent).slice(4);
}
+template <> ArrayRef<uint8_t> GOT0Atom<ELF64BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsGot0AtomContent);
+}
template <> ArrayRef<uint8_t> GOT0Atom<ELF64LE>::rawContent() const {
return llvm::makeArrayRef(mipsGot0AtomContent);
}
@@ -136,10 +207,18 @@ public:
};
template <>
+ArrayRef<uint8_t> GOTModulePointerAtom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsGotModulePointerAtomContent).slice(4);
+}
+template <>
ArrayRef<uint8_t> GOTModulePointerAtom<ELF32LE>::rawContent() const {
return llvm::makeArrayRef(mipsGotModulePointerAtomContent).slice(4);
}
template <>
+ArrayRef<uint8_t> GOTModulePointerAtom<ELF64BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsGotModulePointerAtomContent);
+}
+template <>
ArrayRef<uint8_t> GOTModulePointerAtom<ELF64LE>::rawContent() const {
return llvm::makeArrayRef(mipsGotModulePointerAtomContent);
}
@@ -152,12 +231,17 @@ public:
ArrayRef<uint8_t> rawContent() const override;
};
+template <> ArrayRef<uint8_t> GOTTLSGdAtom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsGotTlsGdAtomContent).slice(8);
+}
template <> ArrayRef<uint8_t> GOTTLSGdAtom<ELF32LE>::rawContent() const {
- return llvm::makeArrayRef(mipsGotTlsGdAtomContent).slice(8);
+ return llvm::makeArrayRef(mipsGotTlsGdAtomContent).slice(8);
+}
+template <> ArrayRef<uint8_t> GOTTLSGdAtom<ELF64BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsGotTlsGdAtomContent);
}
-
template <> ArrayRef<uint8_t> GOTTLSGdAtom<ELF64LE>::rawContent() const {
- return llvm::makeArrayRef(mipsGotTlsGdAtomContent);
+ return llvm::makeArrayRef(mipsGotTlsGdAtomContent);
}
class GOTPLTAtom : public GOTAtom {
@@ -180,7 +264,7 @@ public:
}
};
-class PLT0Atom : public PLTAtom {
+template <class ELFT> class PLT0Atom : public PLTAtom {
public:
PLT0Atom(const Atom *got, const File &f) : PLTAtom(f, ".plt") {
// Setup reference to fixup the PLT0 entry.
@@ -190,11 +274,18 @@ public:
}
ArrayRef<uint8_t> rawContent() const override {
- return llvm::makeArrayRef(mipsPlt0AtomContent);
+ llvm_unreachable("PLT0 is not applicable for this target");
}
};
-class PLT0MicroAtom : public PLTAtom {
+template <> ArrayRef<uint8_t> PLT0Atom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsBePlt0AtomContent);
+}
+template <> ArrayRef<uint8_t> PLT0Atom<ELF32LE>::rawContent() const {
+ return llvm::makeArrayRef(mipsLePlt0AtomContent);
+}
+
+template <class ELFT> class PLT0MicroAtom : public PLTAtom {
public:
PLT0MicroAtom(const Atom *got, const File &f) : PLTAtom(f, ".plt") {
// Setup reference to fixup the PLT0 entry.
@@ -204,10 +295,17 @@ public:
CodeModel codeModel() const override { return codeMipsMicro; }
ArrayRef<uint8_t> rawContent() const override {
- return llvm::makeArrayRef(micromipsPlt0AtomContent);
+ llvm_unreachable("PLT0 is not applicable for this target");
}
};
+template <> ArrayRef<uint8_t> PLT0MicroAtom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(microMipsBePlt0AtomContent);
+}
+template <> ArrayRef<uint8_t> PLT0MicroAtom<ELF32LE>::rawContent() const {
+ return llvm::makeArrayRef(microMipsLePlt0AtomContent);
+}
+
class PLTAAtom : public PLTAtom {
public:
PLTAAtom(const GOTPLTAtom *got, const File &f) : PLTAtom(f, ".plt") {
@@ -216,22 +314,41 @@ public:
addReferenceELF_Mips(R_MIPS_LO16, 4, got, 0);
addReferenceELF_Mips(R_MIPS_LO16, 12, got, 0);
}
+};
+
+template <class ELFT> class PLTARegAtom : public PLTAAtom {
+public:
+ PLTARegAtom(const GOTPLTAtom *got, const File &f) : PLTAAtom(got, f) {}
ArrayRef<uint8_t> rawContent() const override {
- return llvm::makeArrayRef(mipsPltAAtomContent);
+ llvm_unreachable("PLT is not applicable for this target");
}
};
-class PLTR6Atom : public PLTAAtom {
+template <> ArrayRef<uint8_t> PLTARegAtom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsBePltAAtomContent);
+}
+template <> ArrayRef<uint8_t> PLTARegAtom<ELF32LE>::rawContent() const {
+ return llvm::makeArrayRef(mipsLePltAAtomContent);
+}
+
+template <class ELFT> class PLTR6Atom : public PLTAAtom {
public:
PLTR6Atom(const GOTPLTAtom *got, const File &f) : PLTAAtom(got, f) {}
ArrayRef<uint8_t> rawContent() const override {
- return llvm::makeArrayRef(mipsR6PltAAtomContent);
+ llvm_unreachable("PLT is not applicable for this target");
}
};
-class PLTMicroAtom : public PLTAtom {
+template <> ArrayRef<uint8_t> PLTR6Atom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsR6BePltAAtomContent);
+}
+template <> ArrayRef<uint8_t> PLTR6Atom<ELF32LE>::rawContent() const {
+ return llvm::makeArrayRef(mipsR6LePltAAtomContent);
+}
+
+template <class ELFT> class PLTMicroAtom : public PLTAtom {
public:
PLTMicroAtom(const GOTPLTAtom *got, const File &f) : PLTAtom(f, ".plt") {
// Setup reference to fixup the microMIPS PLT entry.
@@ -242,16 +359,23 @@ public:
CodeModel codeModel() const override { return codeMipsMicro; }
ArrayRef<uint8_t> rawContent() const override {
- return llvm::makeArrayRef(micromipsPltAtomContent);
+ llvm_unreachable("PLT is not applicable for this target");
}
};
+template <> ArrayRef<uint8_t> PLTMicroAtom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(microMipsBePltAAtomContent);
+}
+template <> ArrayRef<uint8_t> PLTMicroAtom<ELF32LE>::rawContent() const {
+ return llvm::makeArrayRef(microMipsLePltAAtomContent);
+}
+
class LA25Atom : public PLTAtom {
public:
LA25Atom(const File &f) : PLTAtom(f, ".text") {}
};
-class LA25RegAtom : public LA25Atom {
+template <typename ELFT> class LA25RegAtom : public LA25Atom {
public:
LA25RegAtom(const Atom *a, const File &f) : LA25Atom(f) {
// Setup reference to fixup the LA25 stub entry.
@@ -261,11 +385,18 @@ public:
}
ArrayRef<uint8_t> rawContent() const override {
- return llvm::makeArrayRef(mipsLA25AtomContent);
+ llvm_unreachable("LA25 stubs are not applicable for this target");
}
};
-class LA25MicroAtom : public LA25Atom {
+template <> ArrayRef<uint8_t> LA25RegAtom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(mipsBeLA25AtomContent);
+}
+template <> ArrayRef<uint8_t> LA25RegAtom<ELF32LE>::rawContent() const {
+ return llvm::makeArrayRef(mipsLeLA25AtomContent);
+}
+
+template <typename ELFT> class LA25MicroAtom : public LA25Atom {
public:
LA25MicroAtom(const Atom *a, const File &f) : LA25Atom(f) {
// Setup reference to fixup the microMIPS LA25 stub entry.
@@ -277,10 +408,17 @@ public:
CodeModel codeModel() const override { return codeMipsMicro; }
ArrayRef<uint8_t> rawContent() const override {
- return llvm::makeArrayRef(micromipsLA25AtomContent);
+ llvm_unreachable("LA25 stubs are not applicable for this target");
}
};
+template <> ArrayRef<uint8_t> LA25MicroAtom<ELF32BE>::rawContent() const {
+ return llvm::makeArrayRef(microMipsBeLA25AtomContent);
+}
+template <> ArrayRef<uint8_t> LA25MicroAtom<ELF32LE>::rawContent() const {
+ return llvm::makeArrayRef(microMipsLeLA25AtomContent);
+}
+
class MipsGlobalOffsetTableAtom : public GlobalOffsetTableAtom {
public:
MipsGlobalOffsetTableAtom(const File &f) : GlobalOffsetTableAtom(f) {}
@@ -342,14 +480,14 @@ private:
/// \brief Map Atoms to their PLT entries.
llvm::DenseMap<const Atom *, PLTAAtom *> _pltRegMap;
- llvm::DenseMap<const Atom *, PLTMicroAtom *> _pltMicroMap;
+ llvm::DenseMap<const Atom *, PLTMicroAtom<ELFT> *> _pltMicroMap;
/// \brief Map Atoms to their Object entries.
llvm::DenseMap<const Atom *, ObjectAtom *> _objectMap;
/// \brief Map Atoms to their LA25 entries.
- llvm::DenseMap<const Atom *, LA25RegAtom *> _la25RegMap;
- llvm::DenseMap<const Atom *, LA25MicroAtom *> _la25MicroMap;
+ llvm::DenseMap<const Atom *, LA25Atom *> _la25RegMap;
+ llvm::DenseMap<const Atom *, LA25Atom *> _la25MicroMap;
/// \brief Atoms referenced by static relocations.
llvm::DenseSet<const Atom *> _hasStaticRelocations;
@@ -1085,9 +1223,8 @@ PLTAtom *RelocationPass<ELFT>::createPLT
_gotpltVector.insert(_gotpltVector.begin(), ga0);
if (isMicroMips)
- return new (_file._alloc) PLT0MicroAtom(ga0, _file);
- else
- return new (_file._alloc) PLT0Atom(ga0, _file);
+ return new (_file._alloc) PLT0MicroAtom<ELFT>(ga0, _file);
+ return new (_file._alloc) PLT0Atom<ELFT>(ga0, _file);
}
template <typename ELFT>
@@ -1108,9 +1245,11 @@ const PLTAtom *RelocationPass<ELFT>::get
if (plt != _pltRegMap.end())
return plt->second;
- PLTAAtom *pa = isMipsR6()
- ? new (_file._alloc) PLTR6Atom(getGOTPLTEntry(a), _file)
- : new (_file._alloc) PLTAAtom(getGOTPLTEntry(a), _file);
+ PLTAAtom *pa = nullptr;
+ if (isMipsR6())
+ pa = new (_file._alloc) PLTR6Atom<ELFT>(getGOTPLTEntry(a), _file);
+ else
+ pa = new (_file._alloc) PLTARegAtom<ELFT>(getGOTPLTEntry(a), _file);
_pltRegMap[a] = pa;
_pltRegVector.push_back(pa);
@@ -1127,7 +1266,7 @@ const PLTAtom *RelocationPass<ELFT>::get
if (plt != _pltMicroMap.end())
return plt->second;
- auto pa = new (_file._alloc) PLTMicroAtom(getGOTPLTEntry(a), _file);
+ auto pa = new (_file._alloc) PLTMicroAtom<ELFT>(getGOTPLTEntry(a), _file);
_pltMicroMap[a] = pa;
_pltMicroVector.push_back(pa);
@@ -1144,7 +1283,7 @@ const LA25Atom *RelocationPass<ELFT>::ge
if (la25 != _la25RegMap.end())
return la25->second;
- auto sa = new (_file._alloc) LA25RegAtom(a, _file);
+ auto sa = new (_file._alloc) LA25RegAtom<ELFT>(a, _file);
_la25RegMap[a] = sa;
_la25Vector.push_back(sa);
@@ -1157,7 +1296,7 @@ const LA25Atom *RelocationPass<ELFT>::ge
if (la25 != _la25MicroMap.end())
return la25->second;
- auto sa = new (_file._alloc) LA25MicroAtom(a, _file);
+ auto sa = new (_file._alloc) LA25MicroAtom<ELFT>(a, _file);
_la25MicroMap[a] = sa;
_la25Vector.push_back(sa);
@@ -1186,8 +1325,12 @@ RelocationPass<ELFT>::getObjectEntry(con
static std::unique_ptr<Pass> createPass(MipsLinkingContext &ctx) {
switch (ctx.getTriple().getArch()) {
+ case llvm::Triple::mips:
+ return llvm::make_unique<RelocationPass<ELF32BE>>(ctx);
case llvm::Triple::mipsel:
return llvm::make_unique<RelocationPass<ELF32LE>>(ctx);
+ case llvm::Triple::mips64:
+ return llvm::make_unique<RelocationPass<ELF64BE>>(ctx);
case llvm::Triple::mips64el:
return llvm::make_unique<RelocationPass<ELF64LE>>(ctx);
default:
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsSectionChunks.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsSectionChunks.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsSectionChunks.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsSectionChunks.cpp Mon Jul 13 04:11:35 2015
@@ -44,7 +44,9 @@ template <class ELFT> void MipsReginfoSe
this->_outputSection->setType(this->_type);
}
+template class MipsReginfoSection<ELF32BE>;
template class MipsReginfoSection<ELF32LE>;
+template class MipsReginfoSection<ELF64BE>;
template class MipsReginfoSection<ELF64LE>;
template <class ELFT>
@@ -85,7 +87,9 @@ template <class ELFT> void MipsOptionsSe
this->_outputSection->setType(this->_type);
}
+template class MipsOptionsSection<ELF32BE>;
template class MipsOptionsSection<ELF32LE>;
+template class MipsOptionsSection<ELF64BE>;
template class MipsOptionsSection<ELF64LE>;
template <class ELFT>
@@ -116,7 +120,9 @@ template <class ELFT> void MipsAbiFlagsS
this->_outputSection->setType(this->_type);
}
+template class MipsAbiFlagsSection<ELF32BE>;
template class MipsAbiFlagsSection<ELF32LE>;
+template class MipsAbiFlagsSection<ELF64BE>;
template class MipsAbiFlagsSection<ELF64LE>;
template <class ELFT>
@@ -175,7 +181,9 @@ const AtomLayout *MipsGOTSection<ELFT>::
return AtomSection<ELFT>::appendAtom(atom);
}
+template class MipsGOTSection<ELF32BE>;
template class MipsGOTSection<ELF32LE>;
+template class MipsGOTSection<ELF64BE>;
template class MipsGOTSection<ELF64LE>;
template <class ELFT>
@@ -208,7 +216,9 @@ const AtomLayout *MipsPLTSection<ELFT>::
return layout;
}
+template class MipsPLTSection<ELF32BE>;
template class MipsPLTSection<ELF32LE>;
+template class MipsPLTSection<ELF64BE>;
template class MipsPLTSection<ELF64LE>;
template <class ELFT> static bool isMips64EL() {
@@ -245,7 +255,9 @@ void MipsRelocationTable<ELFT>::writeRel
r.r_offset = writer->addressOfAtom(&atom) + ref.offsetInAtom();
}
+template class MipsRelocationTable<ELF32BE>;
template class MipsRelocationTable<ELF32LE>;
+template class MipsRelocationTable<ELF64BE>;
template class MipsRelocationTable<ELF64LE>;
} // elf
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetHandler.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetHandler.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetHandler.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetHandler.cpp Mon Jul 13 04:11:35 2015
@@ -53,7 +53,9 @@ std::unique_ptr<Writer> MipsTargetHandle
}
}
+template class MipsTargetHandler<ELF32BE>;
template class MipsTargetHandler<ELF32LE>;
+template class MipsTargetHandler<ELF64BE>;
template class MipsTargetHandler<ELF64LE>;
template <class ELFT>
@@ -95,7 +97,9 @@ template <class ELFT> void MipsSymbolTab
}
}
+template class MipsSymbolTable<ELF32BE>;
template class MipsSymbolTable<ELF32LE>;
+template class MipsSymbolTable<ELF64BE>;
template class MipsSymbolTable<ELF64LE>;
template <class ELFT>
@@ -149,7 +153,9 @@ template <class ELFT> void MipsDynamicSy
}
}
+template class MipsDynamicSymbolTable<ELF32BE>;
template class MipsDynamicSymbolTable<ELF32LE>;
+template class MipsDynamicSymbolTable<ELF64BE>;
template class MipsDynamicSymbolTable<ELF64LE>;
}
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetLayout.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetLayout.cpp?rev=242014&r1=242013&r2=242014&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetLayout.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsTargetLayout.cpp Mon Jul 13 04:11:35 2015
@@ -102,7 +102,9 @@ template <class ELFT> void MipsTargetLay
this->_segments.insert(outIt, abiSeg);
}
+template class MipsTargetLayout<ELF32BE>;
template class MipsTargetLayout<ELF32LE>;
+template class MipsTargetLayout<ELF64BE>;
template class MipsTargetLayout<ELF64LE>;
} // end namespace elf
Added: lld/trunk/test/elf/Mips/exe-fileheader-be-64.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/exe-fileheader-be-64.test?rev=242014&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/exe-fileheader-be-64.test (added)
+++ lld/trunk/test/elf/Mips/exe-fileheader-be-64.test Mon Jul 13 04:11:35 2015
@@ -0,0 +1,60 @@
+# Check ELF Header for non-pic big-endian 64-bit executable file.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mips64 -o %t.exe %t.o
+# RUN: llvm-readobj -file-headers %t.exe | FileCheck %s
+
+# CHECK: Format: ELF64-mips
+# CHECK: Arch: mips64
+# CHECK: AddressSize: 64bit
+# CHECK: LoadName:
+# CHECK: ElfHeader {
+# CHECK: Ident {
+# CHECK: Magic: (7F 45 4C 46)
+# CHECK: Class: 64-bit (0x2)
+# CHECK: DataEncoding: BigEndian (0x2)
+# CHECK: FileVersion: 1
+# CHECK: OS/ABI: SystemV (0x0)
+# CHECK: ABIVersion: 0
+# CHECK: Unused: (00 00 00 00 00 00 00)
+# CHECK: }
+# CHECK: Type: Executable (0x2)
+# CHECK: Machine: EM_MIPS (0x8)
+# CHECK: Version: 1
+# CHECK: Entry: 0x{{[0-9A-F]+}}
+# CHECK: ProgramHeaderOffset: 0x{{[0-9A-F]+}}
+# CHECK: SectionHeaderOffset: 0x{{[0-9A-F]+}}
+# CHECK: Flags [ (0x60000007)
+# CHECK: EF_MIPS_ARCH_64 (0x60000000)
+# CHECK: EF_MIPS_CPIC (0x4)
+# CHECK: EF_MIPS_NOREORDER (0x1)
+# CHECK: EF_MIPS_PIC (0x2)
+# CHECK: ]
+# CHECK: HeaderSize: 64
+# CHECK: ProgramHeaderEntrySize: 56
+# CHECK: ProgramHeaderCount: {{[0-9]+}}
+# CHECK: SectionHeaderEntrySize: 64
+# CHECK: SectionHeaderCount: {{[0-9]+}}
+# CHECK: StringTableSectionIndex: {{[0-9]+}}
+# CHECK: }
+
+---
+FileHeader:
+ Class: ELFCLASS64
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_NOREORDER, EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ARCH_64]
+
+Sections:
+ - Name: .text
+ Type: SHT_PROGBITS
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 4
+ Size: 8
+
+Symbols:
+ Global:
+ - Name: __start
+ Section: .text
+...
Added: lld/trunk/test/elf/Mips/exe-fileheader-be.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/exe-fileheader-be.test?rev=242014&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/exe-fileheader-be.test (added)
+++ lld/trunk/test/elf/Mips/exe-fileheader-be.test Mon Jul 13 04:11:35 2015
@@ -0,0 +1,60 @@
+# Check ELF Header for non-pic big-endian 32-bit executable file.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mips -o %t.exe %t.o
+# RUN: llvm-readobj -file-headers %t.exe | FileCheck %s
+
+# CHECK: Format: ELF32-mips
+# CHECK: Arch: mips
+# CHECK: AddressSize: 32bit
+# CHECK: LoadName:
+# CHECK: ElfHeader {
+# CHECK: Ident {
+# CHECK: Magic: (7F 45 4C 46)
+# CHECK: Class: 32-bit (0x1)
+# CHECK: DataEncoding: BigEndian (0x2)
+# CHECK: FileVersion: 1
+# CHECK: OS/ABI: SystemV (0x0)
+# CHECK: ABIVersion: 1
+# CHECK: Unused: (00 00 00 00 00 00 00)
+# CHECK: }
+# CHECK: Type: Executable (0x2)
+# CHECK: Machine: EM_MIPS (0x8)
+# CHECK: Version: 1
+# CHECK: Entry: 0x{{[0-9A-F]+}}
+# CHECK: ProgramHeaderOffset: 0x{{[0-9A-F]+}}
+# CHECK: SectionHeaderOffset: 0x{{[0-9A-F]+}}
+# CHECK: Flags [ (0x50001005)
+# CHECK: EF_MIPS_ABI_O32 (0x1000)
+# CHECK: EF_MIPS_ARCH_32 (0x50000000)
+# CHECK: EF_MIPS_CPIC (0x4)
+# CHECK: EF_MIPS_NOREORDER (0x1)
+# CHECK: ]
+# CHECK: HeaderSize: 52
+# CHECK: ProgramHeaderEntrySize: 32
+# CHECK: ProgramHeaderCount: {{[0-9]+}}
+# CHECK: SectionHeaderEntrySize: 40
+# CHECK: SectionHeaderCount: {{[0-9]+}}
+# CHECK: StringTableSectionIndex: {{[0-9]+}}
+# CHECK: }
+
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_NOREORDER, EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]
+
+Sections:
+ - Name: .text
+ Type: SHT_PROGBITS
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 4
+ Size: 8
+
+Symbols:
+ Global:
+ - Name: __start
+ Section: .text
+...
Added: lld/trunk/test/elf/Mips/la25-stub-be.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/la25-stub-be.test?rev=242014&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/la25-stub-be.test (added)
+++ lld/trunk/test/elf/Mips/la25-stub-be.test Mon Jul 13 04:11:35 2015
@@ -0,0 +1,113 @@
+# REQUIRES: mips
+
+# Check LA25 stubs creation in the big-endian case.
+
+# RUN: yaml2obj -format=elf -docnum 1 %s > %t-npic.o
+# RUN: yaml2obj -format=elf -docnum 2 %s > %t-pic.o
+# RUN: yaml2obj -format=elf -docnum 3 %s > %t-main.o
+# RUN: lld -flavor gnu -target mips -o %t.exe %t-npic.o %t-pic.o %t-main.o
+
+# RUN: llvm-objdump -disassemble %t.exe | FileCheck %s
+
+# CHECK: 400150: 3c 19 00 40 lui $25, 64
+# CHECK-NEXT: 400154: 08 10 00 48 j 4194592
+# CHECK-NEXT: 400158: 27 39 01 20 addiu $25, $25, 288
+# CHECK-NEXT: 40015c: 00 00 00 00 nop
+
+# npic.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_ABI_O32, EF_MIPS_ARCH_32, EF_MIPS_CPIC]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ Size: 4
+ AddressAlign: 16
+ Flags: [SHF_EXECINSTR, SHF_ALLOC]
+
+Symbols:
+ Global:
+ - Name: T1N
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 4
+
+# pic.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_ABI_O32, EF_MIPS_ARCH_32, EF_MIPS_CPIC, EF_MIPS_PIC]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ Size: 4
+ AddressAlign: 16
+ Flags: [SHF_EXECINSTR, SHF_ALLOC]
+
+Symbols:
+ Global:
+ - Name: T1
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 4
+
+# main.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_ABI_O32, EF_MIPS_ARCH_32, EF_MIPS_CPIC]
+
+Sections:
+ - Name: .text
+ Type: SHT_PROGBITS
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 4
+ Size: 40
+
+ - Name: .rel.text
+ Type: SHT_REL
+ Link: .symtab
+ AddressAlign: 4
+ Info: .text
+ Relocations:
+ - Offset: 8
+ Symbol: .text
+ Type: R_MIPS_26
+ - Offset: 16
+ Symbol: __start
+ Type: R_MIPS_26
+ - Offset: 24
+ Symbol: T1N
+ Type: R_MIPS_26
+ - Offset: 32
+ Symbol: T1
+ Type: R_MIPS_26
+
+Symbols:
+ Local:
+ - Name: loc
+ Section: .text
+ Value: 16
+ - Name: .text
+ Type: STT_SECTION
+ Section: .text
+ Global:
+ - Name: __start
+ Section: .text
+ - Name: T1
+ - Name: T1N
+...
Added: lld/trunk/test/elf/Mips/la25-stub-micro-be.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/la25-stub-micro-be.test?rev=242014&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/la25-stub-micro-be.test (added)
+++ lld/trunk/test/elf/Mips/la25-stub-micro-be.test Mon Jul 13 04:11:35 2015
@@ -0,0 +1,121 @@
+# REQUIRES: mips
+
+# Check LA25 stubs creation in the big-endian case.
+
+# RUN: yaml2obj -format=elf -docnum 1 %s > %t-npic.o
+# RUN: yaml2obj -format=elf -docnum 2 %s > %t-pic.o
+# RUN: yaml2obj -format=elf -docnum 3 %s > %t-main.o
+# RUN: lld -flavor gnu -target mips -o %t.exe %t-npic.o %t-pic.o %t-main.o
+
+# RUN: llvm-objdump -disassemble -mattr=micromips %t.exe | FileCheck %s
+
+# CHECK: 400150: 41 be 00 40 lui $fp, 64
+# CHECK-NEXT: 400154: d4 20 00 90 j 4194592
+# CHECK-NEXT: 400158: 33 39 01 21 addiu $25, $25, 289
+# CHECK-NEXT: 40015c: 00 00 00 00 nop
+
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R2,
+ EF_MIPS_CPIC, EF_MIPS_MICROMIPS]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ Size: 4
+ AddressAlign: 16
+ Flags: [SHF_EXECINSTR, SHF_ALLOC]
+
+Symbols:
+ Global:
+ - Name: T1N
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 4
+ Other: [ STO_MIPS_MICROMIPS ]
+
+# pic.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R2,
+ EF_MIPS_CPIC, EF_MIPS_PIC, EF_MIPS_MICROMIPS]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ Size: 4
+ AddressAlign: 16
+ Flags: [SHF_EXECINSTR, SHF_ALLOC]
+
+Symbols:
+ Global:
+ - Name: T1
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 4
+ Other: [ STO_MIPS_MICROMIPS ]
+
+# main.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R2,
+ EF_MIPS_CPIC, EF_MIPS_MICROMIPS]
+
+Sections:
+ - Name: .text
+ Type: SHT_PROGBITS
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 4
+ Content: '0000000000000000f400000000000000f400000000000000f400000000000000f400000000000000'
+# jal loc jal glob jal T1N jal T1
+ - Name: .rel.text
+ Type: SHT_REL
+ Link: .symtab
+ AddressAlign: 4
+ Info: .text
+ Relocations:
+ - Offset: 8
+ Symbol: .text
+ Type: R_MICROMIPS_26_S1
+ - Offset: 16
+ Symbol: glob
+ Type: R_MICROMIPS_26_S1
+ - Offset: 24
+ Symbol: T1N
+ Type: R_MICROMIPS_26_S1
+ - Offset: 32
+ Symbol: T1
+ Type: R_MICROMIPS_26_S1
+
+Symbols:
+ Local:
+ - Name: loc
+ Section: .text
+ Value: 16
+ Size: 24
+ Other: [ STO_MIPS_MICROMIPS ]
+ - Name: .text
+ Type: STT_SECTION
+ Section: .text
+ Global:
+ - Name: __start
+ Section: .text
+ Size: 16
+ Other: [ STO_MIPS_MICROMIPS ]
+ - Name: T1
+ - Name: T1N
+...
Added: lld/trunk/test/elf/Mips/plt-entry-r6-be.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/plt-entry-r6-be.test?rev=242014&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/plt-entry-r6-be.test (added)
+++ lld/trunk/test/elf/Mips/plt-entry-r6-be.test Mon Jul 13 04:11:35 2015
@@ -0,0 +1,109 @@
+# REQUIRES: mips
+
+# Check generation of PLT entries in case of R6 big-endian target ABI.
+
+# Build shared library
+# RUN: yaml2obj -format=elf -docnum 1 %s > %t-so.o
+# RUN: lld -flavor gnu -target mips -shared -o %t.so %t-so.o
+
+# Build executable
+# RUN: yaml2obj -format=elf -docnum 2 %s > %t-o.o
+# RUN: lld -flavor gnu -target mips -e T0 -o %t.exe %t-o.o %t.so
+# RUN: llvm-objdump -d %t.exe | FileCheck %s
+
+# CHECK: Disassembly of section .plt:
+# CHECK-NEXT: .plt:
+# CHECK-NEXT: 400160: 3c 1c 00 40 lui $gp, 64
+# CHECK-NEXT: 400164: 8f 99 20 00 lw $25, 8192($gp)
+# CHECK-NEXT: 400168: 27 9c 20 00 addiu $gp, $gp, 8192
+# CHECK-NEXT: 40016c: 03 1c c0 23 subu $24, $24, $gp
+# CHECK-NEXT: 400170: 03 e0 78 21 move $15, $ra
+# CHECK-NEXT: 400174: 00 18 c0 82 srl $24, $24, 2
+# CHECK-NEXT: 400178: 03 20 f8 09 jalr $25
+# CHECK-NEXT: 40017c: 27 18 ff fe addiu $24, $24, -2
+# CHECK-NEXT: 400180: 3c 0f 00 40 lui $15, 64
+# CHECK-NEXT: 400184: 8d f9 20 08 lw $25, 8200($15)
+# CHECK-NEXT: 400188: 03 20 00 09 jr $25
+# CHECK-NEXT: 40018c: 25 f8 20 08 addiu $24, $15, 8200
+
+# so.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6]
+
+Sections:
+ - Name: .text
+ Type: SHT_PROGBITS
+ Size: 0x0C
+ AddressAlign: 16
+ Flags: [SHF_EXECINSTR, SHF_ALLOC]
+
+Symbols:
+ Global:
+ - Name: T1
+ Section: .text
+ Type: STT_FUNC
+ Value: 0x0
+ Size: 4
+
+# o.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ Content: "0C00000000000000"
+ AddressAlign: 16
+ Flags: [SHF_EXECINSTR, SHF_ALLOC]
+
+- Name: .data
+ Type: SHT_PROGBITS
+ Size: 0x08
+ AddressAlign: 16
+ Flags: [SHF_WRITE, SHF_ALLOC]
+
+- Name: .rel.text
+ Type: SHT_REL
+ Info: .text
+ AddressAlign: 4
+ Relocations:
+ - Offset: 0x0
+ Symbol: T1
+ Type: R_MIPS_26
+
+- Name: .rel.data
+ Type: SHT_REL
+ Info: .data
+ AddressAlign: 4
+ Relocations:
+ - Offset: 0x00
+ Symbol: T1
+ Type: R_MIPS_HI16
+ - Offset: 0x00
+ Symbol: T1
+ Type: R_MIPS_LO16
+
+Symbols:
+ Global:
+ - Name: T0
+ Section: .text
+ Type: STT_FUNC
+ Value: 0x0
+ Size: 0x8
+ - Name: D0
+ Section: .data
+ Type: STT_OBJECT
+ Value: 0x0
+ Size: 8
+ - Name: T1
+...
Added: lld/trunk/test/elf/Mips/plt-header-be.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/plt-header-be.test?rev=242014&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/plt-header-be.test (added)
+++ lld/trunk/test/elf/Mips/plt-header-be.test Mon Jul 13 04:11:35 2015
@@ -0,0 +1,104 @@
+# REQUIRES: mips
+
+# Check initialization of big-endian .plt header entries.
+
+# Build shared library
+# RUN: yaml2obj -format=elf -docnum 1 %s > %t-so.o
+# RUN: lld -flavor gnu -target mips -shared -o %t.so %t-so.o
+
+# Build executable
+# RUN: yaml2obj -format=elf -docnum 2 %s > %t-o.o
+# RUN: lld -flavor gnu -target mips -o %t.exe %t-o.o %t.so
+# RUN: llvm-objdump -section-headers -disassemble %t.exe | FileCheck %s
+
+# CHECK: Disassembly of section .plt:
+# CHECK-NEXT: .plt:
+# CHECK-NEXT: 400160: 3c 1c 00 40 lui $gp, 64
+# CHECK-NEXT: 400164: 8f 99 20 00 lw $25, 8192($gp)
+# CHECK-NEXT: 400168: 27 9c 20 00 addiu $gp, $gp, 8192
+# CHECK-NEXT: 40016c: 03 1c c0 23 subu $24, $24, $gp
+# CHECK-NEXT: 400170: 03 e0 78 21 move $15, $ra
+# CHECK-NEXT: 400174: 00 18 c0 82 srl $24, $24, 2
+# CHECK-NEXT: 400178: 03 20 f8 09 jalr $25
+# CHECK-NEXT: 40017c: 27 18 ff fe addiu $24, $24, -2
+
+# CHECK-NEXT: 400180: 3c 0f 00 40 lui $15, 64
+# CHECK-NEXT: 400184: 8d f9 20 08 lw $25, 8200($15)
+# CHECK-NEXT: 400188: 03 20 00 08 jr $25
+# CHECK-NEXT: 40018c: 25 f8 20 08 addiu $24, $15, 8200
+
+# CHECK: Sections:
+# CHECK: Idx Name Size Address Type
+# CHECK: 6 .plt 00000030 0000000000400160 TEXT DATA
+# CHECK: 10 .got.plt 0000000c 0000000000402000 DATA
+
+# so.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]
+
+Sections:
+ - Name: .text
+ Type: SHT_PROGBITS
+ Size: 12
+ AddressAlign: 16
+ Flags: [SHF_EXECINSTR, SHF_ALLOC]
+
+Symbols:
+ Global:
+ - Name: T1
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 4
+
+# o.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]
+
+Sections:
+ - Name: .text
+ Type: SHT_PROGBITS
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 4
+ Size: 32
+
+ - Name: .rel.text
+ Type: SHT_REL
+ Link: .symtab
+ AddressAlign: 4
+ Info: .text
+ Relocations:
+ - Offset: 8
+ Symbol: .text
+ Type: R_MIPS_26
+ - Offset: 16
+ Symbol: __start
+ Type: R_MIPS_26
+ - Offset: 24
+ Symbol: T1
+ Type: R_MIPS_26
+
+Symbols:
+ Local:
+ - Name: loc
+ Section: .text
+ Value: 16
+ - Name: .text
+ Type: STT_SECTION
+ Section: .text
+
+ Global:
+ - Name: __start
+ Section: .text
+ - Name: T1
+...
Added: lld/trunk/test/elf/Mips/plt-header-micro-be.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/plt-header-micro-be.test?rev=242014&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/plt-header-micro-be.test (added)
+++ lld/trunk/test/elf/Mips/plt-header-micro-be.test Mon Jul 13 04:11:35 2015
@@ -0,0 +1,105 @@
+# REQUIRES: mips
+
+# Check initialization of .plt header entries
+# if all PLT entries use microMIPS big-endian encoding.
+
+# RUN: yaml2obj -format=elf -docnum 1 %s > %t1.o
+# RUN: lld -flavor gnu -target mips -shared -o %t.so %t1.o
+# RUN: yaml2obj -format=elf -docnum 2 %s > %t2.o
+# RUN: lld -flavor gnu -target mips -o %t.exe %t2.o %t.so
+# RUN: llvm-objdump -section-headers -d -mattr=micromips %t.exe | FileCheck %s
+
+# CHECK: Disassembly of section .plt:
+# CHECK-NEXT: .plt:
+# CHECK-NEXT: 400170: 79 80 07 a4 addiupc $3, 7824
+# CHECK-NEXT: 400174: ff 23 00 00 lw $25, 0($3)
+# CHECK-NEXT: 400178: 05 35 subu16 $2, $2, $3
+# CHECK-NEXT: 40017a: 25 25 srl16 $2, $2, 2
+# CHECK-NEXT: 40017c: 33 02 ff fe addiu $24, $2, -2
+# CHECK-NEXT: 400180: 0d ff move $15, $ra
+# CHECK-NEXT: 400182: 45 f9 jalrs16 $25
+# CHECK-NEXT: 400184: 0f 83 move $gp, $3
+# CHECK-NEXT: 400186: 0c 00 nop
+
+# CHECK-NEXT: 400188: 79 00 07 a0 addiupc $2, 7808
+# CHECK-NEXT: 40018c: ff 22 00 00 lw $25, 0($2)
+# CHECK-NEXT: 400190: 45 99 jr16 $25
+# CHECK-NEXT: 400192: 0f 02 move $24, $2
+
+# CHECK: Sections:
+# CHECK: Idx Name Size Address Type
+# CHECK: 6 .plt 00000024 0000000000400170 TEXT DATA
+# CHECK: 10 .got.plt 0000000c 0000000000402000 DATA
+
+# so.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]
+
+Sections:
+ - Name: .text
+ Type: SHT_PROGBITS
+ Size: 12
+ AddressAlign: 16
+ Flags: [SHF_EXECINSTR, SHF_ALLOC]
+
+Symbols:
+ Global:
+ - Name: T1
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 4
+
+# o.o
+---
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32,
+ EF_MIPS_ARCH_32R2, EF_MIPS_MICROMIPS]
+
+Sections:
+ - Name: .text
+ Type: SHT_PROGBITS
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 0x04
+ Content: '0000000000000000f40000000000000000000000f400000000000000f4000000'
+# jal .text jal __start jal T1
+ - Name: .rel.text
+ Type: SHT_REL
+ Link: .symtab
+ AddressAlign: 4
+ Info: .text
+ Relocations:
+ - Offset: 8
+ Symbol: .text
+ Type: R_MICROMIPS_26_S1
+ - Offset: 20
+ Symbol: __start
+ Type: R_MICROMIPS_26_S1
+ - Offset: 28
+ Symbol: T1
+ Type: R_MICROMIPS_26_S1
+
+Symbols:
+ Local:
+ - Name: loc
+ Section: .text
+ Value: 16
+ Other: [ STO_MIPS_MICROMIPS ]
+ - Name: .text
+ Type: STT_SECTION
+ Section: .text
+ Global:
+ - Name: __start
+ Section: .text
+ Other: [ STO_MIPS_MICROMIPS ]
+ - Name: T1
+...
Added: lld/trunk/test/elf/Mips/rel-32-be.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-32-be.test?rev=242014&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-32-be.test (added)
+++ lld/trunk/test/elf/Mips/rel-32-be.test Mon Jul 13 04:11:35 2015
@@ -0,0 +1,60 @@
+# Check handling of R_MIPS_32 relocation in the big-endian case.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mips -o %t.exe %t.o
+# RUN: llvm-objdump -s -t %t.exe | FileCheck %s
+
+# CHECK: Contents of section .data:
+# CHECK-NEXT: 402000 00000000 01402088 01402084
+# ^^ D2 + 0x1000080 = 0x1402088
+# ^^ D1 + 0x1000080 = 0x1402084
+# CHECK: SYMBOL TABLE:
+# CHECK: 00402004 g .data 00000004 D1
+# CHECK: 00402008 g .data 00000004 D2
+
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2MSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ AddressAlign: 16
+ Flags: [SHF_ALLOC]
+ Size: 4
+
+- Name: .data
+ Type: SHT_PROGBITS
+ AddressAlign: 16
+ Flags: [SHF_ALLOC, SHF_WRITE]
+ Content: "000000000100008001000080"
+
+- Name: .rel.data
+ Type: SHT_REL
+ Info: .data
+ AddressAlign: 4
+ Relocations:
+ - Offset: 4
+ Symbol: D2
+ Type: R_MIPS_32
+ - Offset: 8
+ Symbol: D1
+ Type: R_MIPS_32
+
+Symbols:
+ Global:
+ - Name: __start
+ Section: .text
+ Value: 0
+ Size: 4
+ - Name: D1
+ Section: .data
+ Value: 4
+ Size: 4
+ - Name: D2
+ Section: .data
+ Value: 8
+ Size: 4
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