[PATCH] D11063: [X86][SSE] Vectorized v4i32 non-uniform shifts.

Simon Pilgrim llvm-dev at redking.me.uk
Thu Jul 9 08:09:54 PDT 2015


RKSimon created this revision.
RKSimon added reviewers: qcolombet, delena, spatel, andreadb.
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RKSimon set the repository for this revision to rL LLVM.

While the v4i32 shl operation is already vectorized using a cvttps2dq/pmulld pattern, the lshr/ashr opeations are still scalarized.

This patch adds vectorization support for non-uniform v4i32 shift operations - it splats constant shift amounts to allow them to use the immediate sse shift instructions, or extracts/zero-extends non-constant shift amounts. The individual results are then blended together.

Repository:
  rL LLVM

http://reviews.llvm.org/D11063

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86TargetTransformInfo.cpp
  test/Analysis/CostModel/X86/testshiftashr.ll
  test/Analysis/CostModel/X86/testshiftlshr.ll
  test/CodeGen/X86/vector-shift-ashr-128.ll
  test/CodeGen/X86/vector-shift-ashr-256.ll
  test/CodeGen/X86/vector-shift-lshr-128.ll
  test/CodeGen/X86/vector-shift-lshr-256.ll
  test/CodeGen/X86/widen_load-2.ll

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