[llvm] r241801 - [ARM] Don't be overzealous converting Thumb1 3 to 2 operands

[Scott Douglass]

Author: scott-0
Date: Thu Jul  9 09:13:48 2015
New Revision: 241801

URL: http://llvm.org/viewvc/llvm-project?rev=241801&view=rev
Log:
[ARM] Don't be overzealous converting Thumb1 3 to 2 operands

Differential Revision: http://reviews.llvm.org/D11056

Modified:
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/trunk/test/MC/ARM/thumb_rewrites.s

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=241801&r1=241800&r2=241801&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Thu Jul  9 09:13:48 2015
@@ -5512,6 +5512,11 @@ void ARMAsmParser::tryConvertingToTwoOpe
     if (((Mnemonic == "add" && CarrySetting) || Mnemonic == "sub") &&
         Op5.isReg())
       Transform = false;
+
+    // Don't transform 'add/sub{s} Rd, Rd, #imm' if the immediate fits into
+    // 3-bits because the ARMARM says not to.
+    if ((Mnemonic == "add" || Mnemonic == "sub") && Op5.isImm0_7())
+      Transform = false;
   }
 
   if (Transform)

Modified: llvm/trunk/test/MC/ARM/thumb_rewrites.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb_rewrites.s?rev=241801&r1=241800&r2=241801&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb_rewrites.s (original)
+++ llvm/trunk/test/MC/ARM/thumb_rewrites.s Thu Jul  9 09:13:48 2015
@@ -1,5 +1,11 @@
 @ RUN: llvm-mc -triple thumbv6m -show-encoding < %s | FileCheck %s
 
+    adds    r1, r1, #3
+@ CHECK: adds   r1, r1, #3          @ encoding: [0xc9,0x1c]
+
+    adds    r1, #3
+@ CHECK: adds   r1, #3              @ encoding: [0x03,0x31]
+
     adds    r0, r0, #8
 @ CHECK: adds   r0, #8              @ encoding: [0x08,0x30]
 
@@ -34,6 +40,12 @@
     subs    r0, r0, r0
 @ CHECK: subs   r0, r0, r0          @ encoding: [0x00,0x1a]
 
+    subs    r3, r3, #5
+@ CHECK: subs   r3, r3, #5          @ encoding: [0x5b,0x1f]
+
+    subs    r3, #5
+@ CHECK: subs   r3, #5              @ encoding: [0x05,0x3b]
+
     subs    r2, r2, #8
 @ CHECK: subs   r2, #8              @ encoding: [0x08,0x3a]