[llvm] r241206 - [TwoAddressInstructionPass] Try 3 Addr Conversion After Commuting.

Quentin Colombet qcolombet at apple.com
Mon Jul 6 13:13:55 PDT 2015


Hi Bruno,

> On Jul 6, 2015, at 12:21 PM, Bruno Cardoso Lopes <bruno.cardoso at gmail.com> wrote:
> 
> Hi,
> 
> On Wed, Jul 1, 2015 at 8:12 PM, Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at apple.com>> wrote:
>> Author: qcolombet
>> Date: Wed Jul  1 18:12:13 2015
>> New Revision: 241206
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=241206&view=rev
>> Log:
>> [TwoAddressInstructionPass] Try 3 Addr Conversion After Commuting.
>> 
>> TwoAddressInstructionPass stops after a successful commuting but 3 Addr
>> conversion might be good for some cases.
>> 
>> Consider:
>> 
>> int foo(int a, int b) {
>>  return a + b;
>> }
>> 
>> Before this commit, we emit:
>> 
>> addl    %esi, %edi
>> movl    %edi, %eax
>> ret
>> 
>> After this commit, we try 3 Addr conversion:
>> 
>> leal    (%rsi,%rdi), %eax
>> ret
>> 
>> Patch by Volkan Keles <vkeles at apple.com>!
>> 
>> Differential Revision: http://reviews.llvm.org/D10851
>> 
>> Modified:
>>    llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
>>    llvm/trunk/test/CodeGen/X86/commute-two-addr.ll
>>    llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll
>>    llvm/trunk/test/CodeGen/X86/win64_params.ll
>>    llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
>> 
>> Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=241206&r1=241205&r2=241206&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Wed Jul  1 18:12:13 2015
>> @@ -1207,12 +1207,24 @@ tryInstructionTransform(MachineBasicBloc
>>     }
>>   }
>> 
>> +  // If the instruction is convertible to 3 Addr, instead
>> +  // of returning try 3 Addr transformation aggresively and
>> +  // use this variable to check later. Because it might be better.
>> +  // For example, we can just use `leal (%rsi,%rdi), %eax` and `ret`
>> +  // instead of the following code.
>> +  //   addl    %esi, %edi
>> +  //   movl    %edi, %eax
>> +  //   ret
>> +  bool commuted = false;
> 
> Shouldn't we use "Commuted" instead of "commuted"? :-)

You’re right. Good catch!

Fixed in Committed revision 241505.

Cheers,
-Quentin
> 
>>   // If it's profitable to commute, try to do so.
>>   if (TryCommute && commuteInstruction(mi, regB, regC, Dist)) {
>> +    commuted = true;
>>     ++NumCommuted;
>>     if (AggressiveCommute)
>>       ++NumAggrCommuted;
>> -    return false;
>> +    if (!MI.isConvertibleTo3Addr())
>> +      return false;
>>   }
>> 
>>   if (shouldOnlyCommute)
>> @@ -1220,7 +1232,7 @@ tryInstructionTransform(MachineBasicBloc
>> 
>>   // If there is one more use of regB later in the same MBB, consider
>>   // re-schedule this MI below it.
>> -  if (EnableRescheduling && rescheduleMIBelowKill(mi, nmi, regB)) {
>> +  if (!commuted && EnableRescheduling && rescheduleMIBelowKill(mi, nmi, regB)) {
>>     ++NumReSchedDowns;
>>     return true;
>>   }
>> @@ -1237,6 +1249,10 @@ tryInstructionTransform(MachineBasicBloc
>>     }
>>   }
>> 
>> +  // Return if it is commuted but 3 addr conversion is failed.
>> +  if (commuted)
>> +    return false;
>> +
>>   // If there is one more use of regB later in the same MBB, consider
>>   // re-schedule it before this MI if it's legal.
>>   if (EnableRescheduling && rescheduleKillAboveMI(mi, nmi, regB)) {
>> 
>> Modified: llvm/trunk/test/CodeGen/X86/commute-two-addr.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/commute-two-addr.ll?rev=241206&r1=241205&r2=241206&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/commute-two-addr.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/commute-two-addr.ll Wed Jul  1 18:12:13 2015
>> @@ -39,7 +39,7 @@ define %0 @t3(i32 %lb, i8 zeroext %has_l
>> entry:
>> ; DARWIN-LABEL: t3:
>> ; DARWIN: shlq $32, %rcx
>> -; DARWIN-NEXT: orq %rcx, %rax
>> +; DARWIN-NEXT: leaq (%rax,%rcx), %rax
>> ; DARWIN-NEXT: shll $8
>> ; DARWIN-NOT: leaq
>>   %tmp21 = zext i32 %lb to i64
>> 
>> Modified: llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll?rev=241206&r1=241205&r2=241206&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll Wed Jul  1 18:12:13 2015
>> @@ -25,8 +25,7 @@ define i32 @test2(i32 inreg %a, i32 inre
>> entry:
>> ; CHECK-LABEL: test2:
>> ; CHECK: leal
>> -; CHECK-NOT: leal
>> -; CHECK-NOT: mov
>> +; CHECK-NEXT: addl
>> ; CHECK-NEXT: addl
>> ; CHECK-NEXT: ret
>>  %add = add i32 %b, %a
>> 
>> Modified: llvm/trunk/test/CodeGen/X86/win64_params.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/win64_params.ll?rev=241206&r1=241205&r2=241206&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/win64_params.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/win64_params.ll Wed Jul  1 18:12:13 2015
>> @@ -7,8 +7,7 @@ define i32 @f6(i32 %p1, i32 %p2, i32 %p3
>> entry:
>> ; CHECK: movl    48(%rsp), %eax
>> ; CHECK: addl    40(%rsp), %eax
>> -; LINUX: addl    %r9d, %r8d
>> -; LINUX: movl    %r8d, %eax
>> +; LINUX: leal    (%r8,%r9), %eax
>>   %add = add nsw i32 %p6, %p5
>>   ret i32 %add
>> }
>> @@ -27,10 +26,8 @@ entry:
>> ; on other platforms here (note the x86_64_sysvcc calling convention).
>> define x86_64_sysvcc i32 @f8(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6) nounwind readnone optsize {
>> entry:
>> -; CHECK: addl    %r9d, %r8d
>> -; CHECK: movl    %r8d, %eax
>> -; LINUX: addl    %r9d, %r8d
>> -; LINUX: movl    %r8d, %eax
>> +; CHECK: leal    (%r8,%r9), %eax
>> +; LINUX: leal    (%r8,%r9), %eax
>>   %add = add nsw i32 %p6, %p5
>>   ret i32 %add
>> }
>> 
>> Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll?rev=241206&r1=241205&r2=241206&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll (original)
>> +++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll Wed Jul  1 18:12:13 2015
>> @@ -23,7 +23,7 @@
>> ; X32: add
>> ; X32: add
>> ; X32: add
>> -; X32: add
>> +; X32: leal
>> ; X32: %for.body.3
>> define void @sharedidx(i8* nocapture %a, i8* nocapture %b, i8* nocapture %c, i32 %s, i32 %len) nounwind ssp {
>> entry:
>> 
>> 
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> 
> 
> 
> -- 
> Bruno Cardoso Lopes
> http://www.brunocardoso.cc <http://www.brunocardoso.cc/>
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