[llvm] r241410 - [X86][SSE3] Just use an explicit SSE3 target attribute - not a cpu type.

Simon Pilgrim llvm-dev at redking.me.uk
Sun Jul 5 12:06:33 PDT 2015


Author: rksimon
Date: Sun Jul  5 14:06:32 2015
New Revision: 241410

URL: http://llvm.org/viewvc/llvm-project?rev=241410&view=rev
Log:
[X86][SSE3] Just use an explicit SSE3 target attribute - not a cpu type.

Merged arch/target into a specific triple - we had i686 and x86_64 targets overriding each other....

Modified:
    llvm/trunk/test/CodeGen/X86/sse3.ll

Modified: llvm/trunk/test/CodeGen/X86/sse3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse3.ll?rev=241410&r1=241409&r2=241410&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse3.ll Sun Jul  5 14:06:32 2015
@@ -1,6 +1,6 @@
 ; These are tests for SSE3 codegen.
 
-; RUN: llc < %s -march=x86-64 -mcpu=nocona -mtriple=i686-apple-darwin9 -O3 | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 --mattr=+sse3 | FileCheck %s --check-prefix=X64
 
 ; Test for v8xi16 lowering where we extract the first element of the vector and
 ; placed it in the second element of the result.





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