[PATCH] D10585: Add support for nest attribute to AArch64 backend

[Stephen Cross]

scross99 added inline comments.

================
Comment at: test/CodeGen/AArch64/nest-register.ll:8
@@ +7,3 @@
+; CHECK-LABEL: nest_receiver:
+; CHECK-NEXT: // BB#0:
+; CHECK-NEXT: mov x0, x18
----------------
t.p.northover wrote:
> Have you checked this on a non-asserts build? I'm never really sure what gets skipped in the name of efficiency.
Yes, this was tested on a Release build of LLVM with assertions off. Are you suggesting that enabling assertions might catch a problem with this line (I manually verified the output so this shouldn't happen) or that a Release build might not emit the assembly comment?

I did a bit of digging and found that neon-bitcast.ll (Git mirror link: https://github.com/llvm-mirror/llvm/blob/master/test/CodeGen/AArch64/neon-bitcast.ll ) has very similar code, such as:

```
define <1 x i64> @test_v8i8_to_v1i64(<8 x i8> %in) nounwind {
; CHECK: test_v8i8_to_v1i64:
; CHECK-NEXT: // BB#0:
; CHECK-NEXT: ret

  %val = bitcast <8 x i8> %in to <1 x i64>
  ret <1 x i64> %val
}
```

I'm very happy to do further testing with different configurations if needed.


http://reviews.llvm.org/D10585