[PATCH] Add missing builtins to the PPC back end for ABI compliance (vol. 2)

[Nemanja Ivanovic]

Hi wschmidt, hfinkel, kbarton, echristo, seurer,

Back end portion of the second round of additions to altivec.h.

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D10874

Files:
  include/llvm/IR/IntrinsicsPowerPC.td
  lib/Target/PowerPC/PPCInstrVSX.td
  test/CodeGen/PowerPC/vsx-elementary-arith.ll

Index: include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- include/llvm/IR/IntrinsicsPowerPC.td
+++ include/llvm/IR/IntrinsicsPowerPC.td
@@ -694,6 +694,12 @@
 def int_ppc_vsx_xvrdpip :
       Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
 
+// Vector rsqrte
+def int_ppc_vsx_xvrsqrtesp : GCCBuiltin<"__builtin_vsx_xvrsqrtesp">,
+      Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
+def int_ppc_vsx_xvrsqrtedp : GCCBuiltin<"__builtin_vsx_xvrsqrtedp">,
+      Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
+
 // Vector compare
 def int_ppc_vsx_xvcmpeqdp :
       PowerPC_VSX_Intrinsic<"xvcmpeqdp", [llvm_v2i64_ty],
Index: lib/Target/PowerPC/PPCInstrVSX.td
===================================================================
--- lib/Target/PowerPC/PPCInstrVSX.td
+++ lib/Target/PowerPC/PPCInstrVSX.td
@@ -989,6 +989,12 @@
 def : Pat<(int_ppc_vsx_xvdivdp v2f64:$A, v2f64:$B),
           (XVDIVDP $A, $B)>;
 
+// Recip. square root estimate
+def : Pat<(int_ppc_vsx_xvrsqrtesp v4f32:$A),
+          (XVRSQRTESP $A)>;
+def : Pat<(int_ppc_vsx_xvrsqrtedp v2f64:$A),
+          (XVRSQRTEDP $A)>;
+
 } // AddedComplexity
 } // HasVSX
 
Index: test/CodeGen/PowerPC/vsx-elementary-arith.ll
===================================================================
--- test/CodeGen/PowerPC/vsx-elementary-arith.ll
+++ test/CodeGen/PowerPC/vsx-elementary-arith.ll
@@ -116,5 +116,31 @@
 ; CHECK: xssqrtdp {{[0-9]+}}
 }
 
+; Vector forms
+; Function Attrs: nounwind
+define void @emit_xvrsqrte() #0 {
+entry:
+; CHECK-LABEL: @emit_xvrsqrte
+  %vf = alloca <4 x float>, align 16
+  %vfr = alloca <4 x float>, align 16
+  %vd = alloca <2 x double>, align 16
+  %vdr = alloca <2 x double>, align 16
+  %0 = load <4 x float>, <4 x float>* %vf, align 16
+  %1 = call <4 x float> @llvm.ppc.vsx.xvrsqrtesp(<4 x float> %0)
+; CHECK: xvrsqrtesp {{[0-9]+}}, {{[0-9]+}}
+  store <4 x float> %1, <4 x float>* %vfr, align 16
+  %2 = load <2 x double>, <2 x double>* %vd, align 16
+  %3 = call <2 x double> @llvm.ppc.vsx.xvrsqrtedp(<2 x double> %2)
+; CHECK: xvrsqrtedp {{[0-9]+}}, {{[0-9]+}}
+  store <2 x double> %3, <2 x double>* %vdr, align 16
+  ret void
+}
+
 ; Function Attrs: nounwind
 declare double @sqrt(double)
+
+; Function Attrs: nounwind readnone
+declare <4 x float> @llvm.ppc.vsx.xvrsqrtesp(<4 x float>)
+
+; Function Attrs: nounwind readnone
+declare <2 x double> @llvm.ppc.vsx.xvrsqrtedp(<2 x double>)

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