[llvm] r240787 - [DAGCombine] fold (X >>?, exact C1) << C2 --> X << (C2-C1)

[Charlie Turner]

> This could be fixed either by improving aarch64's instruction selector
> to recognize this pattern (this pattern will also be created in IR if
> the input is on integers rather than addresses). Or by disabling the
> transformation for expanded sign extensions, i.e. (x << 32) >> 32. I
> think the former is the better option.

Thank you for the comments Ben, I'll investigate these suggestions.

Regards,
--Charlie.