REPOSITORY
rL LLVM
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Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:118
@@ -117,2 +117,3 @@
+
/// SoftenSetCCOperands - Soften the operands of a comparison. This code is
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There was one newline too many, now there are two. Remove them both?
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Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:130
@@ -128,2 +129,3 @@
RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL;
+ bool getInverseCC = false;
switch (CCCode) {
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Capital g, and name sounds like a function. What about something like "ShouldInvertCC" ?
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Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:184
@@ +183,3 @@
+ default:
+ // Inverse CC for unordered comparison
+ getInverseCC = true;
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"Invert CC for unordered comparisons." ?
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Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:187
@@ -171,15 +186,3 @@
switch (CCCode) {
- case ISD::SETONE:
- // SETONE = SETOLT | SETOGT
- LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 :
- (VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;
- // Fallthrough
- case ISD::SETUGT:
- LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 :
- (VT == MVT::f64) ? RTLIB::OGT_F64 : RTLIB::OGT_F128;
- break;
- case ISD::SETUGE:
- LC2 = (VT == MVT::f32) ? RTLIB::OGE_F32 :
- (VT == MVT::f64) ? RTLIB::OGE_F64 : RTLIB::OGE_F128;
- break;
case ISD::SETULT:
+ LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 :
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Indentation seems off, clang-format?
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Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:216
@@ +215,3 @@
+ if (getInverseCC)
+ CCCode = getSetCCInverse(CCCode, true);
+
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"true" -> "/*isInteger=*/true" ?
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Comment at: test/CodeGen/AArch64/arm64-fp128.ll:153
@@ -152,3 +152,3 @@
; CHECK: cmp w0, #0
; CHECK: cset [[GT:w[0-9]+]], gt
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Is this just "cset w0, gt" ?
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Comment at: test/CodeGen/AArch64/arm64-fp128.ll:167
@@ -171,3 +166,3 @@
; olt == !uge, which LLVM unfortunately "optimizes" this to.
%cond = fcmp olt fp128 %lhs, %rhs
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Can this comment be removed now? I guess your change lets us undo some other transform (which you should probably look into by the way)
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Comment at: test/CodeGen/AArch64/arm64-fp128.ll:170
@@ -179,1 +169,3 @@
+; CHECK: bl __lttf2
; CHECK: cmp w0, #0
+; CHECK-NEXT: b.ge [[IFFALSE:.LBB[0-9]+_[0-9]+]]
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CHECK-NEXT?
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Comment at: test/CodeGen/AArch64/arm64-fp128.ll:171
@@ -179,6 +170,3 @@
; CHECK: cmp w0, #0
-; CHECK: cset [[UNORDERED:w[0-9]+]], ne
-
-; CHECK: orr [[UGE:w[0-9]+]], [[UNORDERED]], [[OGE]]
-; CHECK: cbnz [[UGE]], [[RET29:.LBB[0-9]+_[0-9]+]]
+; CHECK-NEXT: b.ge [[IFFALSE:.LBB[0-9]+_[0-9]+]]
br i1 %cond, label %iftrue, label %iffalse
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You should check IFFALSE/RET29 somewhere.
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Comment at: test/CodeGen/AArch64/arm64-fp128.ll:178
@@ -189,4 +177,3 @@
; CHECK-NEXT: movz w0, #0x2a
-; CHECK-NEXT: b [[REALRET:.LBB[0-9]+_[0-9]+]]
-
+; CHECK: ret
iffalse:
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CHECK-NEXT?
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Comment at: test/CodeGen/AArch64/arm64-fp128.ll:182
@@ -197,2 +181,3 @@
+; CHECK: movz w0, #0x1d
; CHECK: ret
}
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CHECK-NEXT?
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Comment at: test/CodeGen/Thumb2/float-cmp.ll:84
@@ -83,4 +83,3 @@
; CHECK-LABEL: cmp_f_ugt:
-; NONE: bl __aeabi_fcmpgt
-; NONE: bl __aeabi_fcmpun
+; NONE: bl __aeabi_fcmple
; HARD: vcmpe.f32
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Hmm, these might benefit from stricter CHECK/NONE, since I guess the result gets inverted?
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Comment at: test/CodeGen/X86/fp-cmp-sf.ll:1
@@ +1,2 @@
+; RUN: llc < %s -march=x86 -mcpu=pentium -float-abi=soft | FileCheck %s
+
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Can you chmod this file as non-executable? Also, what about "fpcmp-soft-float" or "fpcmp-soft-fp"? "sf" isn't descriptive enough IMO.
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Comment at: test/CodeGen/X86/fp-cmp-sf.ll:127
@@ +126,3 @@
+
+attributes #0 = { nounwind optsize readnone "use-soft-float"="true" }
+
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Why optsize/readnone? For that matter, if you're not doing CHECK-NEXT, why nounwind?
http://reviews.llvm.org/D10804
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