[llvm] r241108 - Fixes a bug with __builtin_vsx_lxvdw4x on Little Endian systems

[Eric Christopher]

Hi Nemanja,

It's often useful in commit messages to explain exactly what the bug was
and how your patch fixes it. Could you update the comment with in the patch
with why you want Intrin->getOperand(2) and remove the commented out code?

Thanks!

-eric

On Tue, Jun 30, 2015 at 12:49 PM Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
wrote:

> Author: nemanjai
> Date: Tue Jun 30 14:45:45 2015
> New Revision: 241108
>
> URL: http://llvm.org/viewvc/llvm-project?rev=241108&view=rev
> Log:
> Fixes a bug with __builtin_vsx_lxvdw4x on Little Endian systems
>
> Added:
>     llvm/trunk/test/CodeGen/PowerPC/lxvw4x-bug.ll
> Modified:
>     llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=241108&r1=241107&r2=241108&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Jun 30 14:45:45
> 2015
> @@ -9960,7 +9960,10 @@ SDValue PPCTargetLowering::expandVSXLoad
>    case ISD::INTRINSIC_W_CHAIN: {
>      MemIntrinsicSDNode *Intrin = cast<MemIntrinsicSDNode>(N);
>      Chain = Intrin->getChain();
> -    Base = Intrin->getBasePtr();
> +    // I supppose that similarly to the store case below, this doesn't get
> +    // us what we want. Get operand 2 instead.
> +    //Base = Intrin->getBasePtr();
> +    Base = Intrin->getOperand(2);
>      MMO = Intrin->getMemOperand();
>      break;
>    }
>
> Added: llvm/trunk/test/CodeGen/PowerPC/lxvw4x-bug.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/lxvw4x-bug.ll?rev=241108&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/PowerPC/lxvw4x-bug.ll (added)
> +++ llvm/trunk/test/CodeGen/PowerPC/lxvw4x-bug.ll Tue Jun 30 14:45:45 2015
> @@ -0,0 +1,25 @@
> +; RUN: llc -O0 -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown < %s |
> FileCheck %s
> +; Function Attrs: nounwind
> +define void @test() {
> +entry:
> +  %__a.addr.i = alloca i32, align 4
> +  %__b.addr.i = alloca <4 x i32>*, align 8
> +  %i = alloca <4 x i32>, align 16
> +  %j = alloca <4 x i32>, align 16
> +  store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, <4 x i32>* %i, align 16
> +  store i32 0, i32* %__a.addr.i, align 4
> +  store <4 x i32>* %i, <4 x i32>** %__b.addr.i, align 8
> +  %0 = load i32, i32* %__a.addr.i, align 4
> +  %1 = load <4 x i32>*, <4 x i32>** %__b.addr.i, align 8
> +  %2 = bitcast <4 x i32>* %1 to i8*
> +  %3 = getelementptr i8, i8* %2, i32 %0
> +  %4 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %3)
> +; CHECK: lwa [[REG0:[0-9]+]],
> +; CHECK: lxvd2x [[REG1:[0-9]+]], {{[0-9]+}}, [[REG0]]
> +; CHECK: xxswapd [[REG1]], [[REG1]]
> +  store <4 x i32> %4, <4 x i32>* %j, align 16
> +  ret void
> +}
> +
> +; Function Attrs: nounwind readonly
> +declare <4 x i32> @llvm.ppc.vsx.lxvw4x(i8*)
>
>
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