[PATCH] Tablegen: Extend target register information by giving the users access to call preserved register mask names.

[Duncan P. N. Exon Smith]

> On 2015-Jun-22, at 14:30, Alex Lorenz <arphaman at gmail.com> wrote:
> 
> This is what tablegen would produce for the X86 TRI:
> 
>  ArrayRef<const uint32_t *> X86GenRegisterInfo::getRegMasks() const {
>    static const uint32_t *Masks[] = {
>      CSR_32_RegMask, 
>      CSR_32EHRet_RegMask, 
>      CSR_64_RegMask, 
>      CSR_64EHRet_RegMask, 
>      CSR_64_AllRegs_RegMask, 
>      CSR_64_AllRegs_AVX_RegMask, 
>      CSR_64_Intel_OCL_BI_RegMask, 
>      CSR_64_Intel_OCL_BI_AVX_RegMask, 
>      CSR_64_Intel_OCL_BI_AVX512_RegMask, 
>      CSR_64_MostRegs_RegMask, 
>      CSR_64_RT_AllRegs_RegMask, 
>      CSR_64_RT_AllRegs_AVX_RegMask, 
>      CSR_64_RT_MostRegs_RegMask, 
>      CSR_NoRegs_RegMask, 
>      CSR_Win64_RegMask, 
>      CSR_Win64_Intel_OCL_BI_AVX_RegMask, 
>      CSR_Win64_Intel_OCL_BI_AVX512_RegMask, 
>      nullptr
>    };
>    return ArrayRef<const uint32_t *>(Masks, (size_t)17);
>  }
> 
>  ArrayRef<const char *> X86GenRegisterInfo::getRegMaskNames() const {
>    static const char *Names[] = {
>      "CSR_32",
>      "CSR_32EHRet",
>      "CSR_64",
>      "CSR_64EHRet",
>      "CSR_64_AllRegs",
>      "CSR_64_AllRegs_AVX",
>      "CSR_64_Intel_OCL_BI",
>      "CSR_64_Intel_OCL_BI_AVX",
>      "CSR_64_Intel_OCL_BI_AVX512",
>      "CSR_64_MostRegs",
>      "CSR_64_RT_AllRegs",
>      "CSR_64_RT_AllRegs_AVX",
>      "CSR_64_RT_MostRegs",
>      "CSR_NoRegs",
>      "CSR_Win64",
>      "CSR_Win64_Intel_OCL_BI_AVX",
>      "CSR_Win64_Intel_OCL_BI_AVX512",
>      nullptr
>    };
>    return ArrayRef<const char *>(Names, (size_t)17);
>  }
> 
> 
> REPOSITORY
>  rL LLVM
> 
> http://reviews.llvm.org/D10615

This introduces code without using or testing it.  I think it'd be
better to squash it with its first use.