[PATCH] [mips] MFC0, MTC0 changes, COP0 register class definition.

[Daniel Sanders]

The change looks correct to me but the patch lacks appropriate test cases. Could you add them?


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Comment at: lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp:82-83
@@ -81,2 +81,4 @@
       ri_gprmask |= Value;
+    else if (COP0RegClass->contains(CurrentSubReg))
+      ri_cprmask[0] |= Value;
     else if (FGR32RegClass->contains(CurrentSubReg) ||
----------------
Tiny nit: Could you add a small comment that the FPU is COP1? This will make the ordering of the if-statements obvious.

http://reviews.llvm.org/D10567

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