[PATCH] [mips] [IAS] Add support for LAReg with identical source and destination register operands.

[Daniel Sanders]

LGTM with a nit


================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1765
@@ +1764,3 @@
+  }
+  unsigned IntermediateDstReg = (ATReg != 0) ? ATReg : DstReg;
+
----------------
Nit: We don't need to use ATReg again so you can fold that ternary operator into the control flow above.

================
Comment at: test/MC/Mips/mips-expansions.s:153
@@ -152,1 +152,3 @@
 
+# CHECK: ori  $8, $8, 20                # encoding: [0x14,0x00,0x08,0x35]
+# CHECK: lui  $1, 1                     # encoding: [0x01,0x00,0x01,0x3c]
----------------
tomatabacu wrote:
> dsanders wrote:
> > I think this should be:
> >   addiu $8, $8, 20
> I thought this was reported as a bug to the GAS developers and they said that they would switch to also use ORi.
> Even if we decide to change it, it should be in a separate patch.
I'd forgotten about that, thanks for reminding me.

It's not exactly a bug. If I remember my conversation with Matthew correctly, there was some benefit to favoring addiu in the really old CPU's but that benefit no longer applies to anything in use today.

http://reviews.llvm.org/D9367

EMAIL PREFERENCES
  http://reviews.llvm.org/settings/panel/emailpreferences/