[PATCH] [x86] add a reassociation optimization to increase ILP via the MachineCombiner pass

[Gerolf Hoflehner]

Hi Sanjay,

is this on phabricator? 

My understanding of the code is that you reassociate patterns like A = ?? op ??; B = A op X; C = B op Y, but your comments suggest A’s statement can use any operand. Please check in isReassocCandidate():

+  // We must match a simple chain of dependent ops.
+  if (checkPrevOpcode && MI1->getOpcode() != AssocOpcode)
+    return nullptr;

and note that for all incarnations checkPrevOpcode is ‘true’. Or do I miss something?

Cheers
Gerolf




> On Jun 9, 2015, at 2:31 PM, Sanjay Patel <spatel at rotateright.com> wrote:
> 
> Patch updated based on Gerolf's feedback:
> 
> 1. Renamed patterns to be slightly more meaningful
> 2. Split functions that got much too big
> 3. Replace lengthy and repetitive 'switch' with selectable array for operand indexes
> 
> Also, while stepping through in the debugger, I discovered that my attempted recycling of a virtual register was causing the critical path calculation to be wrong, so I changed that to use a new VR (see comment in the code).
> 
> Finally, I added a comment regarding the machine combiner's internal logic: it replaces instructions even if there is no outright win in critical path or resources (just a tie). I'm not sure if that should be changed in a separate patch, but I think it would make it easier to generalize this reassociation pattern further while limiting the compile time hit. Ie, we don't need to have a sequence of 3 identical ops for this reassociation optimization, just 2.
> 
> 
> http://reviews.llvm.org/D10321
> 
> Files:
>  lib/Target/X86/X86InstrInfo.cpp
>  lib/Target/X86/X86InstrInfo.h
>  lib/Target/X86/X86TargetMachine.cpp
>  test/CodeGen/X86/fp-fast.ll
> 
> EMAIL PREFERENCES
>  http://reviews.llvm.org/settings/panel/emailpreferences/
> <D10321.27400.patch>

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