[PATCH] [ARM] Add knowledge of FPU subtarget features to TargetParser

[Jonathan Roelofs]

REPOSITORY
  rL LLVM

================
Comment at: lib/Support/TargetParser.cpp:35
@@ +34,3 @@
+// (only 16 D registers), and sp-d16 (only single-precision instructions and
+// only 16 D registers).
+enum FPURestriction {
----------------
it would be much better to encode these comments like this:

    FR_None,   //< No Restriction
    FR_D16,    //< Only 16 D registers
    FR_SP_D16, //< Only single precision instructions, with 16 D registers

================
Comment at: lib/Support/TargetParser.cpp:48
@@ -29,1 +47,3 @@
   ARM::FPUKind ID;
+  // FPUVersion corresponds directly to the FP architecture version number.
+  unsigned FPUVersion;
----------------
and this one like this:

    unsigned FPUVersion; //< corresponds directly to the FP arch version number

http://reviews.llvm.org/D10237

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