[PATCH] [mips][FastISel] Implement the select statement for MIPS FastISel.

[Daniel Sanders]

LGTM with the type check corrected and the FIXMEs added.


================
Comment at: lib/Target/Mips/MipsFastISel.cpp:906
@@ +905,3 @@
+
+  if (VT <= MVT::i32) {
+    CondMovOpc = Mips::MOVN_I_I;
----------------
MVT::INVALID_SIMPLE_VALUE_TYPE and MVT::Other are included in this check and shouldn't be.

Also, you can't rely on the types being defined in this order. You could use:
  VT.isInteger() && !VT.isVector() && VT.getSizeInBits() <= 32

================
Comment at: test/CodeGen/Mips/Fast-ISel/sel1.ll:8
@@ +7,3 @@
+
+  ; CHECK:            xor     $[[T0:[0-9]+]], $4, $zero
+  ; CHECK-NEXT:       sltu    $[[T1:[0-9]+]], $zero, $[[T0]]
----------------
Nit: Redundant instruction. You can leave a FIXME for now and follow up on it.

================
Comment at: test/CodeGen/Mips/Fast-ISel/sel1.ll:23-24
@@ +22,4 @@
+  ; CHECK-DAG:        seb     $[[T0:[0-9]+]], $4
+  ; CHECK-DAG:        seb     $[[T1:[0-9]+]], $zero
+  ; CHECK:            xor     $[[T2:[0-9]+]], $[[T0]], $[[T1]]
+  ; CHECK-NEXT:       sltu    $[[T3:[0-9]+]], $zero, $[[T2]]
----------------
Nit: Redundant instructions. You can leave a FIXME for now and follow up on it.

================
Comment at: test/CodeGen/Mips/Fast-ISel/sel1.ll:39-40
@@ +38,4 @@
+  ; CHECK-DAG:        seh     $[[T0:[0-9]+]], $4
+  ; CHECK-DAG:        seh     $[[T1:[0-9]+]], $zero
+  ; CHECK:            xor     $[[T2:[0-9]+]], $[[T0]], $[[T1]]
+  ; CHECK-NEXT:       sltu    $[[T3:[0-9]+]], $zero, $[[T2]]
----------------
Nit: Redundant instructions. You can leave a FIXME for now and follow up on it.

================
Comment at: test/CodeGen/Mips/Fast-ISel/sel1.ll:53
@@ +52,3 @@
+
+  ; CHECK:            xor     $[[T0:[0-9]+]], $4, $zero
+  ; CHECK-NEXT:       sltu    $[[T1:[0-9]+]], $zero, $[[T0]]
----------------
Nit: Redundant instruction. You can leave a FIXME for now and follow up on it.

================
Comment at: test/CodeGen/Mips/Fast-ISel/sel1.ll:68
@@ +67,3 @@
+  ; CHECK-DAG:        mtc1    $5, $f1
+  ; CHECK-DAG:        xor     $[[T0:[0-9]+]], $4, $zero
+  ; CHECK:            sltu    $[[T1:[0-9]+]], $zero, $[[T0]]
----------------
Nit: Redundant instruction. You can leave a FIXME for now and follow up on it.

================
Comment at: test/CodeGen/Mips/Fast-ISel/sel1.ll:83
@@ +82,3 @@
+  ; CHECK-DAG:        ldc1    $f0, 16($sp)
+  ; CHECK-DAG:        xor     $[[T0:[0-9]+]], $4, $zero
+  ; CHECK:            sltu    $[[T1:[0-9]+]], $zero, $[[T0]]
----------------
Nit: Redundant instruction. You can leave a FIXME for now and follow up on it.

http://reviews.llvm.org/D6774

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