[PATCH] ARMLoadStoreOptimizer: Rewrite LDM/STM matching logic.
matze at braunis.de
Fri May 29 14:48:05 PDT 2015
Hi rengolin, mroth, jmolloy,
This improves the logic in several ways and is a preparation for
- First perform an analysis and create a list of merge candidates, then
transform. This simplifies the code in that you have don't have to
care to much anymore that you may be holding iterators to
MachineInstrs that get removed.
- Analyze/Transform basic blocks in reverse order. This allows to use
LivePhysRegs to find free registers instead of the RegisterScavenger.
The RegisterScavenger will become less precise in the future as it
relies on the deprecated kill-flags.
- Return the newly created node in MergeOps so there's no need to look
around in the schedule to find it.
- Rename some MBBI iterators to InsertBefore to make their role clear.
- General code cleanup.
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