[PATCH 5/5] R600: Don't create private AS copies of global variables
Jan Vesely
jan.vesely at rutgers.edu
Mon May 25 17:08:10 PDT 2015
Needs mesa patch. Loads from gloabl variables use VTX2,
all other loads from constant AAS are converted to Global AS loads in the
earlier commit.
Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
---
lib/Target/R600/AMDGPUISelLowering.cpp | 37 +--------------
lib/Target/R600/R600ISelLowering.cpp | 9 +---
test/CodeGen/R600/gv-const-addrspace-complex.ll | 63 +++++++++++++++++++++++++
test/CodeGen/R600/gv-const-addrspace-fail.ll | 57 ----------------------
test/CodeGen/R600/gv-const-addrspace.ll | 25 +++++-----
5 files changed, 78 insertions(+), 113 deletions(-)
create mode 100644 test/CodeGen/R600/gv-const-addrspace-complex.ll
delete mode 100644 test/CodeGen/R600/gv-const-addrspace-fail.ll
diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
index 3d3a53c..9483bff 100644
--- a/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -801,43 +801,8 @@ SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI,
getPointerTy(AMDGPUAS::LOCAL_ADDRESS));
}
case AMDGPUAS::CONSTANT_ADDRESS: {
- MachineFrameInfo *FrameInfo = DAG.getMachineFunction().getFrameInfo();
- Type *EltType = GV->getType()->getElementType();
- unsigned Size = TD->getTypeAllocSize(EltType);
- unsigned Alignment = TD->getPrefTypeAlignment(EltType);
-
- MVT PrivPtrVT = getPointerTy(AMDGPUAS::PRIVATE_ADDRESS);
MVT ConstPtrVT = getPointerTy(AMDGPUAS::CONSTANT_ADDRESS);
-
- int FI = FrameInfo->CreateStackObject(Size, Alignment, false);
- SDValue InitPtr = DAG.getFrameIndex(FI, PrivPtrVT);
-
- const GlobalVariable *Var = cast<GlobalVariable>(GV);
- if (!Var->hasInitializer()) {
- // This has no use, but bugpoint will hit it.
- return DAG.getZExtOrTrunc(InitPtr, SDLoc(Op), ConstPtrVT);
- }
-
- const Constant *Init = Var->getInitializer();
- SmallVector<SDNode*, 8> WorkList;
-
- for (SDNode::use_iterator I = DAG.getEntryNode()->use_begin(),
- E = DAG.getEntryNode()->use_end(); I != E; ++I) {
- if (I->getOpcode() != AMDGPUISD::REGISTER_LOAD && I->getOpcode() != ISD::LOAD)
- continue;
- WorkList.push_back(*I);
- }
- SDValue Chain = LowerConstantInitializer(Init, GV, InitPtr, DAG.getEntryNode(), DAG);
- for (SmallVector<SDNode*, 8>::iterator I = WorkList.begin(),
- E = WorkList.end(); I != E; ++I) {
- SmallVector<SDValue, 8> Ops;
- Ops.push_back(Chain);
- for (unsigned i = 1; i < (*I)->getNumOperands(); ++i) {
- Ops.push_back((*I)->getOperand(i));
- }
- DAG.UpdateNodeOperands(*I, Ops);
- }
- return DAG.getZExtOrTrunc(InitPtr, SDLoc(Op), ConstPtrVT);
+ return DAG.getConstant(0, SDLoc(Op), ConstPtrVT);
}
}
diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
index 33909bf..49aba16 100644
--- a/lib/Target/R600/R600ISelLowering.cpp
+++ b/lib/Target/R600/R600ISelLowering.cpp
@@ -1474,14 +1474,7 @@ SDValue R600TargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const
if (isa<GlobalVariable>(GetUnderlyingObject(
LoadNode->getMemOperand()->getValue(), *getDataLayout()))) {
- SDValue Ptr = DAG.getZExtOrTrunc(LoadNode->getBasePtr(), DL,
- getPointerTy(AMDGPUAS::PRIVATE_ADDRESS));
- Ptr = DAG.getNode(ISD::SRL, DL, MVT::i32, Ptr,
- DAG.getConstant(2, DL, MVT::i32));
- return DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, Op->getVTList(),
- LoadNode->getChain(), Ptr,
- DAG.getTargetConstant(0, DL, MVT::i32),
- Op.getOperand(2));
+ return SDValue();
} else {
/* Replace with global load from the same address */
EVT MemVT = LoadNode->getMemoryVT();
diff --git a/test/CodeGen/R600/gv-const-addrspace-complex.ll b/test/CodeGen/R600/gv-const-addrspace-complex.ll
new file mode 100644
index 0000000..4243e4c
--- /dev/null
+++ b/test/CodeGen/R600/gv-const-addrspace-complex.ll
@@ -0,0 +1,63 @@
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; XUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
+
+
+ at a = internal addrspace(2) constant [1 x i8] [ i8 7 ], align 1
+
+; FUNC-LABEL: {{^}}test_i8:
+; SI: buffer_store_byte
+; SI: s_endpgm
+
+; EG: VTX_READ_8
+define void @test_i8( i32 %s, i8 addrspace(1)* %out) #3 {
+ %arrayidx = getelementptr inbounds [1 x i8], [1 x i8] addrspace(2)* @a, i32 0, i32 %s
+ %1 = load i8, i8 addrspace(2)* %arrayidx, align 1
+ store i8 %1, i8 addrspace(1)* %out
+ ret void
+}
+
+ at b = internal addrspace(2) constant [1 x i16] [ i16 7 ], align 2
+
+; FUNC-LABEL: {{^}}test_i16:
+; SI: buffer_store_short
+; SI: s_endpgm
+
+; EG: VTX_READ_16
+define void @test_i16( i32 %s, i16 addrspace(1)* %out) #3 {
+ %arrayidx = getelementptr inbounds [1 x i16], [1 x i16] addrspace(2)* @b, i32 0, i32 %s
+ %1 = load i16, i16 addrspace(2)* %arrayidx, align 2
+ store i16 %1, i16 addrspace(1)* %out
+ ret void
+}
+
+%struct.bar = type { float, [5 x i8] }
+
+; The illegal i8s aren't handled
+ at struct_bar_gv = internal addrspace(2) constant [1 x %struct.bar] [ %struct.bar { float 16.0, [5 x i8] [i8 0, i8 1, i8 2, i8 3, i8 4] } ]
+
+; FUNC-LABEL: {{^}}struct_bar_gv_load:
+
+; EG: VTX_READ_8
+define void @struct_bar_gv_load(i8 addrspace(1)* %out, i32 %index) {
+ %gep = getelementptr inbounds [1 x %struct.bar], [1 x %struct.bar] addrspace(2)* @struct_bar_gv, i32 0, i32 0, i32 1, i32 %index
+ %load = load i8, i8 addrspace(2)* %gep, align 1
+ store i8 %load, i8 addrspace(1)* %out, align 1
+ ret void
+}
+
+
+; The private load isn't scalarized.
+ at array_vector_gv = internal addrspace(2) constant [4 x <4 x i32>] [ <4 x i32> <i32 1, i32 2, i32 3, i32 4>,
+ <4 x i32> <i32 5, i32 6, i32 7, i32 8>,
+ <4 x i32> <i32 9, i32 10, i32 11, i32 12>,
+ <4 x i32> <i32 13, i32 14, i32 15, i32 16> ]
+
+; FUNC-LABEL: {{^}}array_vector_gv_load:
+; EG: VTX_READ_128
+define void @array_vector_gv_load(<4 x i32> addrspace(1)* %out, i32 %index) {
+ %gep = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>] addrspace(2)* @array_vector_gv, i32 0, i32 %index
+ %load = load <4 x i32>, <4 x i32> addrspace(2)* %gep, align 16
+ store <4 x i32> %load, <4 x i32> addrspace(1)* %out, align 16
+ ret void
+}
diff --git a/test/CodeGen/R600/gv-const-addrspace-fail.ll b/test/CodeGen/R600/gv-const-addrspace-fail.ll
deleted file mode 100644
index 014b0a5..0000000
--- a/test/CodeGen/R600/gv-const-addrspace-fail.ll
+++ /dev/null
@@ -1,57 +0,0 @@
-; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
-; XUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
-
-
- at a = internal addrspace(2) constant [1 x i8] [ i8 7 ], align 1
-
-; FUNC-LABEL: {{^}}test_i8:
-; EG: CF_END
-; SI: buffer_store_byte
-; SI: s_endpgm
-define void @test_i8( i32 %s, i8 addrspace(1)* %out) #3 {
- %arrayidx = getelementptr inbounds [1 x i8], [1 x i8] addrspace(2)* @a, i32 0, i32 %s
- %1 = load i8, i8 addrspace(2)* %arrayidx, align 1
- store i8 %1, i8 addrspace(1)* %out
- ret void
-}
-
- at b = internal addrspace(2) constant [1 x i16] [ i16 7 ], align 2
-
-; FUNC-LABEL: {{^}}test_i16:
-; EG: CF_END
-; SI: buffer_store_short
-; SI: s_endpgm
-define void @test_i16( i32 %s, i16 addrspace(1)* %out) #3 {
- %arrayidx = getelementptr inbounds [1 x i16], [1 x i16] addrspace(2)* @b, i32 0, i32 %s
- %1 = load i16, i16 addrspace(2)* %arrayidx, align 2
- store i16 %1, i16 addrspace(1)* %out
- ret void
-}
-
-%struct.bar = type { float, [5 x i8] }
-
-; The illegal i8s aren't handled
- at struct_bar_gv = internal addrspace(2) constant [1 x %struct.bar] [ %struct.bar { float 16.0, [5 x i8] [i8 0, i8 1, i8 2, i8 3, i8 4] } ]
-
-; FUNC-LABEL: {{^}}struct_bar_gv_load:
-define void @struct_bar_gv_load(i8 addrspace(1)* %out, i32 %index) {
- %gep = getelementptr inbounds [1 x %struct.bar], [1 x %struct.bar] addrspace(2)* @struct_bar_gv, i32 0, i32 0, i32 1, i32 %index
- %load = load i8, i8 addrspace(2)* %gep, align 1
- store i8 %load, i8 addrspace(1)* %out, align 1
- ret void
-}
-
-
-; The private load isn't scalarzied.
- at array_vector_gv = internal addrspace(2) constant [4 x <4 x i32>] [ <4 x i32> <i32 1, i32 2, i32 3, i32 4>,
- <4 x i32> <i32 5, i32 6, i32 7, i32 8>,
- <4 x i32> <i32 9, i32 10, i32 11, i32 12>,
- <4 x i32> <i32 13, i32 14, i32 15, i32 16> ]
-
-; FUNC-LABEL: {{^}}array_vector_gv_load:
-define void @array_vector_gv_load(<4 x i32> addrspace(1)* %out, i32 %index) {
- %gep = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>] addrspace(2)* @array_vector_gv, i32 0, i32 %index
- %load = load <4 x i32>, <4 x i32> addrspace(2)* %gep, align 16
- store <4 x i32> %load, <4 x i32> addrspace(1)* %out, align 16
- ret void
-}
diff --git a/test/CodeGen/R600/gv-const-addrspace.ll b/test/CodeGen/R600/gv-const-addrspace.ll
index 3c1fc6c..cc3af82 100644
--- a/test/CodeGen/R600/gv-const-addrspace.ll
+++ b/test/CodeGen/R600/gv-const-addrspace.ll
@@ -12,12 +12,8 @@
; SI: buffer_load_dword
; VI: s_load_dword
-; EG-DAG: MOV {{\** *}}T2.X
-; EG-DAG: MOV {{\** *}}T3.X
-; EG-DAG: MOV {{\** *}}T4.X
-; EG-DAG: MOV {{\** *}}T5.X
-; EG-DAG: MOV {{\** *}}T6.X
-; EG: MOVA_INT
+; EG: VTX_READ_32
+; EG-NOT: MOVA_INT
define void @float(float addrspace(1)* %out, i32 %index) {
entry:
@@ -35,12 +31,8 @@ entry:
; SI: buffer_load_dword
; VI: s_load_dword
-; EG-DAG: MOV {{\** *}}T2.X
-; EG-DAG: MOV {{\** *}}T3.X
-; EG-DAG: MOV {{\** *}}T4.X
-; EG-DAG: MOV {{\** *}}T5.X
-; EG-DAG: MOV {{\** *}}T6.X
-; EG: MOVA_INT
+; EG: VTX_READ_32
+; EG-NOT: MOVA_INT
define void @i32(i32 addrspace(1)* %out, i32 %index) {
entry:
@@ -58,6 +50,8 @@ entry:
; FUNC-LABEL: {{^}}struct_foo_gv_load:
; GCN: s_load_dword
+; EG: VTX_READ_32
+; EG-NOT: MOVA_INT
define void @struct_foo_gv_load(i32 addrspace(1)* %out, i32 %index) {
%gep = getelementptr inbounds [1 x %struct.foo], [1 x %struct.foo] addrspace(2)* @struct_foo_gv, i32 0, i32 0, i32 1, i32 %index
%load = load i32, i32 addrspace(2)* %gep, align 4
@@ -74,6 +68,9 @@ define void @struct_foo_gv_load(i32 addrspace(1)* %out, i32 %index) {
; FIXME: We should be using s_load_dword here.
; SI: buffer_load_dword
; VI: s_load_dword
+
+; EG: VTX_READ_32
+; EG-NOT: MOVA_INT
define void @array_v1_gv_load(<1 x i32> addrspace(1)* %out, i32 %index) {
%gep = getelementptr inbounds [4 x <1 x i32>], [4 x <1 x i32>] addrspace(2)* @array_v1_gv, i32 0, i32 %index
%load = load <1 x i32>, <1 x i32> addrspace(2)* %gep, align 4
@@ -81,6 +78,10 @@ define void @array_v1_gv_load(<1 x i32> addrspace(1)* %out, i32 %index) {
ret void
}
+; FUNC-LABEL: {{^}}gv_addressing_in_branch:
+
+; EG: VTX_READ_32
+; EG-NOT: MOVA_INT
define void @gv_addressing_in_branch(float addrspace(1)* %out, i32 %index, i32 %a) {
entry:
%0 = icmp eq i32 0, %a
--
2.1.0
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