[PATCH 1/5] R600: Add comments to subword private address load lowering code

[Jan Vesely]

Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
---
 lib/Target/R600/AMDGPUISelLowering.cpp | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
index a232d21..3d3a53c 100644
--- a/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -1456,22 +1456,34 @@ SDValue AMDGPUTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
       ExtType == ISD::NON_EXTLOAD || Load->getMemoryVT().bitsGE(MVT::i32))
     return SDValue();
 
+  /* <SI && AS=PRIVATE && EXTLOAD && size < 32bit,
+   * register (2-)byte extract  */
 
+  /* Get Register holding the target*/
   SDValue Ptr = DAG.getNode(ISD::SRL, DL, MVT::i32, Load->getBasePtr(),
                             DAG.getConstant(2, DL, MVT::i32));
+  /* Load the Register */
   SDValue Ret = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, Op.getValueType(),
                             Load->getChain(), Ptr,
                             DAG.getTargetConstant(0, DL, MVT::i32),
                             Op.getOperand(2));
+
+  /* Get offset within register */
   SDValue ByteIdx = DAG.getNode(ISD::AND, DL, MVT::i32,
                                 Load->getBasePtr(),
                                 DAG.getConstant(0x3, DL, MVT::i32));
+
+  /* Bit offset of target byte (byteIdx * 8) */
   SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx,
                                  DAG.getConstant(3, DL, MVT::i32));
 
+  /* Shift to the right */
   Ret = DAG.getNode(ISD::SRL, DL, MVT::i32, Ret, ShiftAmt);
 
+  /* Eliminate the upper bits by setting them to ... */
   EVT MemEltVT = MemVT.getScalarType();
+
+  /* ... ones */
   if (ExtType == ISD::SEXTLOAD) {
     SDValue MemEltVTNode = DAG.getValueType(MemEltVT);
 
@@ -1483,6 +1495,7 @@ SDValue AMDGPUTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
     return DAG.getMergeValues(Ops, DL);
   }
 
+  /* ... or zeros */
   SDValue Ops[] = {
     DAG.getZeroExtendInReg(Ret, DL, MemEltVT),
     Load->getChain()
-- 
2.1.0