[PATCH] Refactor: Simplify boolean conditional return statements in lib/Target/X86

[Craig Topper]

================
Comment at: lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp:228
@@ -230,2 +227,3 @@
+  return (BaseReg.getReg() != 0 &&
        X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg.getReg())) ||
       (IndexReg.getReg() != 0 &&
----------------
Indent to start after the opening parenthese on the previous line.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:2231
@@ -2230,6 +2230,3 @@
   CallingConv::ID CalleeCC = CS.getCallingConv();
-  if (!IsTailCallConvention(CalleeCC) && !IsCCallConvention(CalleeCC))
-    return false;
-
-  return true;
+  return !(!IsTailCallConvention(CalleeCC) && !IsCCallConvention(CalleeCC));
 }
----------------
Push the negate through

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:3825
@@ -3832,5 +3824,3 @@
   unsigned BitSize = Ty->getPrimitiveSizeInBits();
-  if (BitSize == 0 || BitSize > 64)
-    return false;
-  return true;
+  return !(BitSize == 0 || BitSize > 64);
 }
----------------
Push the negate through

================
Comment at: lib/Target/X86/X86InstrInfo.cpp:2500
@@ -2499,6 +2499,3 @@
 
-    if (TargetRegisterInfo::isVirtualRegister(NewSrc) &&
-        !MF.getRegInfo().constrainRegClass(NewSrc, RC))
-      return false;
-
-    return true;
+    return !(TargetRegisterInfo::isVirtualRegister(NewSrc) &&
+        !MF.getRegInfo().constrainRegClass(NewSrc, RC));
----------------
Push negate through and fix indentation on second line.

================
Comment at: lib/Target/X86/X86InstrInfo.cpp:4144
@@ -4147,2 +4143,3 @@
+  return ((FlagI->getOpcode() == X86::CMP64ri32 &&
         OI->getOpcode() == X86::SUB64ri32) ||
        (FlagI->getOpcode() == X86::CMP64ri8 &&
----------------
Fix indentation

http://reviews.llvm.org/D9987

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