[PATCH] [mips][microMIPSr6] Implement NOR, OR, ORI, XOR and XORI instructions

[Jozef Kolek]

LGTM with a nit.


================
Comment at: test/MC/Disassembler/Mips/micromips32r6.txt:18
@@ +17,3 @@
+
+# CHECK: nor $3, $4, $5
+0x00 0xa4 0x1a 0xd0
----------------
Use the single-line style.

http://reviews.llvm.org/D8800

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