[PATCH] [llvm-mc] fix 64-bit mode call disassembly to ignore opcode size prefix

Matthew Barney m4b.github.io at gmail.com
Fri May 8 10:57:12 PDT 2015


fix for ignoring opcode prefixes for jmp 0xe9

Unfortunately all of the jcc instructions which use rel16 are broken as well; it doesn't seem very pretty to add a bunch of cases, but not sure what else to do without doing some refactoring or digging into other potential places to correctly disassemble these kinds of edge cases.

what do you think?

- added n.s. -> not supported;
- quick fix for jmp e9; using switch now, and e9 requires displacement and immediate explicitly set, xoring opsize alone will not suffice for correct disassembly;
- jmp 0xe9 x86-64 unit tests added;


http://reviews.llvm.org/D9573

Files:
  lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
  test/MC/Disassembler/X86/x86-64.txt

Index: lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
===================================================================
--- lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
+++ lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
@@ -980,6 +980,25 @@
       insn->opcode == 0xE3)
     attrMask ^= ATTR_ADSIZE;
 
+  /*
+   * CALL/JMP 64-bit mode fix to ignore opcode size prefix when disassembling
+   * and consume all 4 bytes of the immediate/displacement instead;
+   * NOTE: intel spec states CALL rel16/JMP rel16  is Not Supported in 64-bit mode
+   */
+
+  if (insn->mode == MODE_64BIT && insn->opcodeType == ONEBYTE && isPrefixAtLocation(insn, 0x66, insn->necessaryPrefixLocation)){
+    switch (insn->opcode){
+    case 0xE8:
+      attrMask ^= ATTR_OPSIZE;
+      break;
+    case 0xE9:
+      attrMask ^= ATTR_OPSIZE;
+      insn->immediateSize = 4;
+      insn->displacementSize = 4;
+      break;
+    }
+  }
+
   if (getIDWithAttrMask(&instructionID, insn, attrMask))
     return -1;
 
Index: test/MC/Disassembler/X86/x86-64.txt
===================================================================
--- test/MC/Disassembler/X86/x86-64.txt
+++ test/MC/Disassembler/X86/x86-64.txt
@@ -301,3 +301,18 @@
 
 # CHECK: movq %rax, 1515870810
 0x67, 0x48 0xa3 0x5a 0x5a 0x5a 0x5a
+
+# CHECK: callq -32769
+0x66 0xe8 0xff 0x7f 0xff 0xff
+
+# CHECK: callq -32769
+0x66 0x66 0x48 0xe8 0xff 0x7f 0xff 0xff
+
+# CHECK: jmp -32769
+0xe9 0xff 0x7f 0xff 0xff
+
+# CHECK: jmp -32769
+0x66 0xe9 0xff 0x7f 0xff 0xff
+
+# CHECK: jmp -32769
+0x66 0x66 0x48 0xe9 0xff 0x7f 0xff 0xff

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