[LLVMdev] Preserving the order of WRITE_REGISTER, READ_REGISTER in IR and ISelDAG

[Johnson, Nicholas Paul]

(sorry, forgot to CC the llvm-commits list)

No, I do not have commit access.  Attached with default context.  Thanks

N

>>-----Original Message-----
>>From: Hal Finkel [mailto:hfinkel at anl.gov]
>>Sent: Wednesday, May 06, 2015 11:52 AM
>>To: Johnson, Nicholas Paul
>>Subject: Re: [LLVMdev] Preserving the order of WRITE_REGISTER,
>>READ_REGISTER in IR and ISelDAG
>>
>>----- Original Message -----
>>> From: "Nicholas Paul Johnson"
>><Nicholas.Paul.Johnson at DEShawResearch.com>
>>> To: "Hal Finkel" <hfinkel at anl.gov>
>>> Sent: Wednesday, May 6, 2015 10:46:14 AM
>>> Subject: RE: [LLVMdev] Preserving the order of WRITE_REGISTER,
>>READ_REGISTER in IR and ISelDAG
>>>
>>> I have attached an updated patch; see below.
>>
>>Hi Nick, thanks! Do you have commit access? If not, can you please send a
>>non-full-context patch (full context patches are great for phabricator, but
>not
>>for the mailing list)?
>>
>> -Hal
>>
>>>
>>>
>>> Nick:
>>> >> Some embedded programmers might prefer the R/W semantics to
>>> >> prevent
>>> >> the compiler from re-ordering explicit register reads, but either
>>> >> semantics are acceptable for my purposes.
>>> Hal:
>>> >Are you talking about registers that update their values upon being
>>> >read? (so
>>> >reading itself updates the state).
>>>
>>> Yeah, those are ugly.  Another use case is asynchronous hardware that
>>> updates registers after some time delay.
>>>
>>> But that doesn't matter for my use case; IntrReadMem works well for
>>> me.  IMO, those *very* ugly cases should be handled with
>>> hand-written assembly.
>>>
>>>
>>>
>>> Nick:
>>> >> I disagree that the expression 'getValue(RegValue).getOperand(0)'
>>> >> evaluates to a chain.
>>> Hal:
>>> >Ah, indeed. You're right, and the code looks wrong. Calling getRoot
>>> >should
>>> >give the right thing. This change LGTM.
>>>
>>> Thanks, though you make a subtle point:
>>> SelectionDAGBuilder::getRoot() is correct but
>>> SelectionDAG::getRoot() is incorrect because it leaves some
>>> PendingLoads hanging.
>>>
>>> My patch on Bugzilla incorrectly uses DAG.getRoot(); it should
>>> instead use this->getRoot().  See attached.
>>>
>>> N
>>>
>>>
>>>
>>>
>>>
>>
>>--
>>Hal Finkel
>>Assistant Computational Scientist
>>Leadership Computing Facility
>>Argonne National Laboratory
-------------- next part --------------
A non-text attachment was scrubbed...
Name: bug-23389c.patch
Type: application/octet-stream
Size: 3372 bytes
Desc: bug-23389c.patch
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150507/19d2284e/attachment.obj>