[llvm] r236156 - tidy up; NFC
Sanjay Patel
spatel at rotateright.com
Wed Apr 29 14:01:41 PDT 2015
Author: spatel
Date: Wed Apr 29 16:01:41 2015
New Revision: 236156
URL: http://llvm.org/viewvc/llvm-project?rev=236156&view=rev
Log:
tidy up; NFC
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=236156&r1=236155&r2=236156&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Apr 29 16:01:41 2015
@@ -7653,6 +7653,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
EVT VT = N->getValueType(0);
+ SDLoc DL(N);
const TargetOptions &Options = DAG.getTarget().Options;
// fold vector ops
@@ -7662,22 +7663,22 @@ SDValue DAGCombiner::visitFADD(SDNode *N
// fold (fadd c1, c2) -> c1 + c2
if (N0CFP && N1CFP)
- return DAG.getNode(ISD::FADD, SDLoc(N), VT, N0, N1);
+ return DAG.getNode(ISD::FADD, DL, VT, N0, N1);
// canonicalize constant to RHS
if (N0CFP && !N1CFP)
- return DAG.getNode(ISD::FADD, SDLoc(N), VT, N1, N0);
+ return DAG.getNode(ISD::FADD, DL, VT, N1, N0);
// fold (fadd A, (fneg B)) -> (fsub A, B)
if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) &&
isNegatibleForFree(N1, LegalOperations, TLI, &Options) == 2)
- return DAG.getNode(ISD::FSUB, SDLoc(N), VT, N0,
+ return DAG.getNode(ISD::FSUB, DL, VT, N0,
GetNegatedExpression(N1, DAG, LegalOperations));
// fold (fadd (fneg A), B) -> (fsub B, A)
if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) &&
isNegatibleForFree(N0, LegalOperations, TLI, &Options) == 2)
- return DAG.getNode(ISD::FSUB, SDLoc(N), VT, N1,
+ return DAG.getNode(ISD::FSUB, DL, VT, N1,
GetNegatedExpression(N0, DAG, LegalOperations));
// If 'unsafe math' is enabled, fold lots of things.
@@ -7693,17 +7694,16 @@ SDValue DAGCombiner::visitFADD(SDNode *N
// fold (fadd (fadd x, c1), c2) -> (fadd x, (fadd c1, c2))
if (N1CFP && N0.getOpcode() == ISD::FADD && N0.getNode()->hasOneUse() &&
isa<ConstantFPSDNode>(N0.getOperand(1)))
- return DAG.getNode(ISD::FADD, SDLoc(N), VT, N0.getOperand(0),
- DAG.getNode(ISD::FADD, SDLoc(N), VT,
- N0.getOperand(1), N1));
+ return DAG.getNode(ISD::FADD, DL, VT, N0.getOperand(0),
+ DAG.getNode(ISD::FADD, DL, VT, N0.getOperand(1), N1));
// If allowed, fold (fadd (fneg x), x) -> 0.0
if (AllowNewConst && N0.getOpcode() == ISD::FNEG && N0.getOperand(0) == N1)
- return DAG.getConstantFP(0.0, SDLoc(N), VT);
+ return DAG.getConstantFP(0.0, DL, VT);
// If allowed, fold (fadd x, (fneg x)) -> 0.0
if (AllowNewConst && N1.getOpcode() == ISD::FNEG && N1.getOperand(0) == N0)
- return DAG.getConstantFP(0.0, SDLoc(N), VT);
+ return DAG.getConstantFP(0.0, DL, VT);
// We can fold chains of FADD's of the same value into multiplications.
// This transform is not safe in general because we are reducing the number
@@ -7715,9 +7715,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N
// (fadd (fmul x, c), x) -> (fmul x, c+1)
if (CFP01 && !CFP00 && N0.getOperand(0) == N1) {
- SDLoc DL(N);
- SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT,
- SDValue(CFP01, 0),
+ SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, SDValue(CFP01, 0),
DAG.getConstantFP(1.0, DL, VT));
return DAG.getNode(ISD::FMUL, DL, VT, N1, NewCFP);
}
@@ -7726,12 +7724,9 @@ SDValue DAGCombiner::visitFADD(SDNode *N
if (CFP01 && !CFP00 && N1.getOpcode() == ISD::FADD &&
N1.getOperand(0) == N1.getOperand(1) &&
N0.getOperand(0) == N1.getOperand(0)) {
- SDLoc DL(N);
- SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT,
- SDValue(CFP01, 0),
+ SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, SDValue(CFP01, 0),
DAG.getConstantFP(2.0, DL, VT));
- return DAG.getNode(ISD::FMUL, DL, VT,
- N0.getOperand(0), NewCFP);
+ return DAG.getNode(ISD::FMUL, DL, VT, N0.getOperand(0), NewCFP);
}
}
@@ -7741,9 +7736,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N
// (fadd x, (fmul x, c)) -> (fmul x, c+1)
if (CFP11 && !CFP10 && N1.getOperand(0) == N0) {
- SDLoc DL(N);
- SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT,
- SDValue(CFP11, 0),
+ SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, SDValue(CFP11, 0),
DAG.getConstantFP(1.0, DL, VT));
return DAG.getNode(ISD::FMUL, DL, VT, N0, NewCFP);
}
@@ -7752,9 +7745,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N
if (CFP11 && !CFP10 && N0.getOpcode() == ISD::FADD &&
N0.getOperand(0) == N0.getOperand(1) &&
N1.getOperand(0) == N0.getOperand(0)) {
- SDLoc DL(N);
- SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT,
- SDValue(CFP11, 0),
+ SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, SDValue(CFP11, 0),
DAG.getConstantFP(2.0, DL, VT));
return DAG.getNode(ISD::FMUL, DL, VT, N1.getOperand(0), NewCFP);
}
@@ -7765,7 +7756,6 @@ SDValue DAGCombiner::visitFADD(SDNode *N
// (fadd (fadd x, x), x) -> (fmul x, 3.0)
if (!CFP && N0.getOperand(0) == N0.getOperand(1) &&
(N0.getOperand(0) == N1)) {
- SDLoc DL(N);
return DAG.getNode(ISD::FMUL, DL, VT,
N1, DAG.getConstantFP(3.0, DL, VT));
}
@@ -7776,7 +7766,6 @@ SDValue DAGCombiner::visitFADD(SDNode *N
// (fadd x, (fadd x, x)) -> (fmul x, 3.0)
if (!CFP10 && N1.getOperand(0) == N1.getOperand(1) &&
N1.getOperand(0) == N0) {
- SDLoc DL(N);
return DAG.getNode(ISD::FMUL, DL, VT,
N0, DAG.getConstantFP(3.0, DL, VT));
}
@@ -7788,7 +7777,6 @@ SDValue DAGCombiner::visitFADD(SDNode *N
N0.getOperand(0) == N0.getOperand(1) &&
N1.getOperand(0) == N1.getOperand(1) &&
N0.getOperand(0) == N1.getOperand(0)) {
- SDLoc DL(N);
return DAG.getNode(ISD::FMUL, DL, VT,
N0.getOperand(0), DAG.getConstantFP(4.0, DL, VT));
}
@@ -7796,7 +7784,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N
// Canonicalize chains of adds to LHS to simplify the following transform.
if (N0.getOpcode() != ISD::FADD && N1.getOpcode() == ISD::FADD)
- return DAG.getNode(ISD::FADD, SDLoc(N), VT, N1, N0);
+ return DAG.getNode(ISD::FADD, DL, VT, N1, N0);
// Convert a chain of 3 dependent operations into 2 independent operations
// and 1 dependent operation:
@@ -7807,8 +7795,8 @@ SDValue DAGCombiner::visitFADD(SDNode *N
SDValue N00 = N0.getOperand(0);
if (N00.getOpcode() == ISD::FADD) {
SDValue N01 = N0.getOperand(1);
- SDValue NewAdd = DAG.getNode(ISD::FADD, SDLoc(N), VT, N1, N01);
- return DAG.getNode(ISD::FADD, SDLoc(N), VT, N00, NewAdd);
+ SDValue NewAdd = DAG.getNode(ISD::FADD, DL, VT, N1, N01);
+ return DAG.getNode(ISD::FADD, DL, VT, N00, NewAdd);
}
}
} // enable-unsafe-fp-math
@@ -7894,6 +7882,7 @@ SDValue DAGCombiner::visitFMUL(SDNode *N
ConstantFPSDNode *N0CFP = isConstOrConstSplatFP(N0);
ConstantFPSDNode *N1CFP = isConstOrConstSplatFP(N1);
EVT VT = N->getValueType(0);
+ SDLoc DL(N);
const TargetOptions &Options = DAG.getTarget().Options;
// fold vector ops
@@ -7905,12 +7894,12 @@ SDValue DAGCombiner::visitFMUL(SDNode *N
// fold (fmul c1, c2) -> c1*c2
if (N0CFP && N1CFP)
- return DAG.getNode(ISD::FMUL, SDLoc(N), VT, N0, N1);
+ return DAG.getNode(ISD::FMUL, DL, VT, N0, N1);
// canonicalize constant to RHS
if (isConstantFPBuildVectorOrConstantFP(N0) &&
!isConstantFPBuildVectorOrConstantFP(N1))
- return DAG.getNode(ISD::FMUL, SDLoc(N), VT, N1, N0);
+ return DAG.getNode(ISD::FMUL, DL, VT, N1, N0);
// fold (fmul A, 1.0) -> A
if (N1CFP && N1CFP->isExactlyValue(1.0))
@@ -7939,9 +7928,8 @@ SDValue DAGCombiner::visitFMUL(SDNode *N
// the second operand of the outer multiply are constants.
if ((N1CFP && isConstOrConstSplatFP(N01)) ||
(BV1 && BV01 && BV1->isConstant() && BV01->isConstant())) {
- SDLoc SL(N);
- SDValue MulConsts = DAG.getNode(ISD::FMUL, SL, VT, N01, N1);
- return DAG.getNode(ISD::FMUL, SL, VT, N00, MulConsts);
+ SDValue MulConsts = DAG.getNode(ISD::FMUL, DL, VT, N01, N1);
+ return DAG.getNode(ISD::FMUL, DL, VT, N00, MulConsts);
}
}
}
@@ -7951,21 +7939,20 @@ SDValue DAGCombiner::visitFMUL(SDNode *N
// during an early run of DAGCombiner can prevent folding with fmuls
// inserted during lowering.
if (N0.getOpcode() == ISD::FADD && N0.getOperand(0) == N0.getOperand(1)) {
- SDLoc SL(N);
- const SDValue Two = DAG.getConstantFP(2.0, SL, VT);
- SDValue MulConsts = DAG.getNode(ISD::FMUL, SL, VT, Two, N1);
- return DAG.getNode(ISD::FMUL, SL, VT, N0.getOperand(0), MulConsts);
+ const SDValue Two = DAG.getConstantFP(2.0, DL, VT);
+ SDValue MulConsts = DAG.getNode(ISD::FMUL, DL, VT, Two, N1);
+ return DAG.getNode(ISD::FMUL, DL, VT, N0.getOperand(0), MulConsts);
}
}
// fold (fmul X, 2.0) -> (fadd X, X)
if (N1CFP && N1CFP->isExactlyValue(+2.0))
- return DAG.getNode(ISD::FADD, SDLoc(N), VT, N0, N0);
+ return DAG.getNode(ISD::FADD, DL, VT, N0, N0);
// fold (fmul X, -1.0) -> (fneg X)
if (N1CFP && N1CFP->isExactlyValue(-1.0))
if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))
- return DAG.getNode(ISD::FNEG, SDLoc(N), VT, N0);
+ return DAG.getNode(ISD::FNEG, DL, VT, N0);
// fold (fmul (fneg X), (fneg Y)) -> (fmul X, Y)
if (char LHSNeg = isNegatibleForFree(N0, LegalOperations, TLI, &Options)) {
@@ -7973,7 +7960,7 @@ SDValue DAGCombiner::visitFMUL(SDNode *N
// Both can be negated for free, check to see if at least one is cheaper
// negated.
if (LHSNeg == 2 || RHSNeg == 2)
- return DAG.getNode(ISD::FMUL, SDLoc(N), VT,
+ return DAG.getNode(ISD::FMUL, DL, VT,
GetNegatedExpression(N0, DAG, LegalOperations),
GetNegatedExpression(N1, DAG, LegalOperations));
}
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