[PATCH] Sparc: Support PSR, TBR, WIM read/write instructions.

[James Y Knight]

Note: I left the registers and asm syntax enabled in both modes; that seems to be what's typically done elsewhere, how gcc's assembler works, and I imagine might be useful for if you wanted to write an asm file which can run in both v8 and v9 processors (with appropriate runtime branches).


================
Comment at: lib/Target/Sparc/SparcInstrInfo.td:735
@@ -734,1 +734,3 @@
 
+let rs2 = 0, rs1 = 0, Uses=[PSR] in
+  def RDPSR : F3_1<2, 0b101001,
----------------
venkatra wrote:
> These instructions and the registers %wim, %tbr, %psr do not exist in sparcV9. Predicate them with HasNoV9.
> 
Yes thanks, done.

http://reviews.llvm.org/D8971

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