[PATCH] [mips] [IAS] Fix expansion of negative 32-bit immediates for LI/DLI.

[Toma Tabacu]

Switched to using the templates from MathExtras.h.
Switched to using ORi instead of LUi for DLI, to avoid sign-extension.
Rebased on top of http://reviews.llvm.org/D8974, http://reviews.llvm.org/D9289 and http://reviews.llvm.org/D9290 to make things easier to do.

Will switch the other paths to use the templates from MathExtras.h in a follow-up patch.


http://reviews.llvm.org/D8662

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  test/MC/Mips/mips-expansions.s
  test/MC/Mips/mips64-expansions.s

Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp
===================================================================
--- lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -1755,17 +1755,30 @@
     tmpInst.addOperand(MCOperand::CreateReg(UseSrcReg ? SrcReg : Mips::ZERO));
     tmpInst.addOperand(MCOperand::CreateImm(ImmValue));
     Instructions.push_back(tmpInst);
-  } else if ((ImmValue & 0xffffffff) == ImmValue) {
+  } else if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) {
     // For all other values which are representable as a 32-bit integer:
     // li d,j => lui d,hi16(j)
     //           ori d,d,lo16(j)
     uint16_t Bits31To16 = (ImmValue >> 16) & 0xffff;
     uint16_t Bits15To0 = ImmValue & 0xffff;
 
-    tmpInst.setOpcode(Mips::LUi);
-    tmpInst.addOperand(MCOperand::CreateReg(DstReg));
-    tmpInst.addOperand(MCOperand::CreateImm(Bits31To16));
-    Instructions.push_back(tmpInst);
+    if (!Is32BitImm && isUInt<32>(ImmValue)) {
+      // For DLI, expand to an ORi instead of a LUi to avoid sign-extending the
+      // upper 32 bits.
+      tmpInst.setOpcode(Mips::ORi);
+      tmpInst.addOperand(MCOperand::CreateReg(DstReg));
+      tmpInst.addOperand(MCOperand::CreateReg(Mips::ZERO));
+      tmpInst.addOperand(MCOperand::CreateImm(Bits31To16));
+      tmpInst.setLoc(IDLoc);
+      Instructions.push_back(tmpInst);
+      // Move the value to the upper 16 bits by doing a 16-bit left shift.
+      createLShiftOri<16>(0, DstReg, IDLoc, Instructions);
+    } else {
+      tmpInst.setOpcode(Mips::LUi);
+      tmpInst.addOperand(MCOperand::CreateReg(DstReg));
+      tmpInst.addOperand(MCOperand::CreateImm(Bits31To16));
+      Instructions.push_back(tmpInst);
+    }
     createLShiftOri<0>(Bits15To0, DstReg, IDLoc, Instructions);
 
     if (UseSrcReg) {
Index: test/MC/Mips/mips-expansions.s
===================================================================
--- test/MC/Mips/mips-expansions.s
+++ test/MC/Mips/mips-expansions.s
@@ -11,6 +11,8 @@
 # CHECK:     addiu   $8, $zero, -8    # encoding: [0xf8,0xff,0x08,0x24]
 # CHECK:     lui     $9, 1            # encoding: [0x01,0x00,0x09,0x3c]
 # CHECK-NOT: ori $9, $9, 0            # encoding: [0x00,0x00,0x29,0x35]
+# CHECK:     lui     $10, 65519       # encoding: [0xef,0xff,0x0a,0x3c]
+# CHECK:     ori     $10, $10, 61423  # encoding: [0xef,0xef,0x4a,0x35]
 
 # CHECK: ori     $4, $zero, 20       # encoding: [0x14,0x00,0x04,0x34]
 # CHECK: lui     $7, 1               # encoding: [0x01,0x00,0x07,0x3c]
@@ -73,6 +75,7 @@
     li $7,65538
     li $8, ~7
     li $9, 0x10000
+    li $10, ~(0x101010)
 
     la $a0, 20
     la $7,65538
Index: test/MC/Mips/mips64-expansions.s
===================================================================
--- test/MC/Mips/mips64-expansions.s
+++ test/MC/Mips/mips64-expansions.s
@@ -10,14 +10,16 @@
 # CHECK:     addiu $6, $zero, -2345 # encoding: [0xd7,0xf6,0x06,0x24]
 
   dli $7, 65538
-# CHECK:     lui   $7, 1            # encoding: [0x01,0x00,0x07,0x3c]
+# CHECK:     ori   $7, $zero, 1     # encoding: [0x01,0x00,0x07,0x34]
+# CHECK:     dsll  $7, $7, 16       # encoding: [0x38,0x3c,0x07,0x00]
 # CHECK:     ori   $7, $7, 2        # encoding: [0x02,0x00,0xe7,0x34]
 
   dli $8, ~7
 # CHECK:     addiu $8, $zero, -8    # encoding: [0xf8,0xff,0x08,0x24]
 
   dli $9, 0x10000
-# CHECK:     lui   $9, 1            # encoding: [0x01,0x00,0x09,0x3c]
+# CHECK:     ori   $9, $zero, 1     # encoding: [0x01,0x00,0x09,0x34]
+# CHECK:     dsll  $9, $9, 16       # encoding: [0x38,0x4c,0x09,0x00]
 # CHECK-NOT: ori   $9, $9, 0        # encoding: [0x00,0x00,0x29,0x35]
 
 
@@ -178,3 +180,14 @@
 # CHECK: ori    $8, $8, 65534       # encoding: [0xfe,0xff,0x08,0x35]
 # CHECK: dsll   $8, $8, 16          # encoding: [0x38,0x44,0x08,0x00]
 # CHECK: ori    $8, $8, 65535       # encoding: [0xff,0xff,0x08,0x35]
+
+# Check that signed negative 32-bit immediates are loaded correctly:
+  li $10, ~(0x101010)
+# CHECK: lui $10, 65519      # encoding: [0xef,0xff,0x0a,0x3c]
+# CHECK: ori $10, $10, 61423 # encoding: [0xef,0xef,0x4a,0x35]
+# CHECK-NOT: dsll
+
+  dli $10, ~(0x202020)
+# CHECK: lui $10, 65503      # encoding: [0xdf,0xff,0x0a,0x3c]
+# CHECK: ori $10, $10, 57311 # encoding: [0xdf,0xdf,0x4a,0x35]
+# CHECK-NOT: dsll

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