[PATCH] [X86] Updates to X86 backend for f16 promotion

[Ahmed Bougacha]

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:750-753
@@ -749,1 +749,6 @@
+
+      // EXTLOAD for MVT::f16 vectors is not legal because f16 vectors are
+      // split/scalarized right now.
+      if (VT.getVectorElementType() == MVT::f16)
+        setLoadExtAction(ISD::EXTLOAD, InnerVT, VT, Expand);
     }
----------------
A longstanding item on my todo list is to properly support F16C, where this is legal, and we don't even need to scalarize vector conversions.  I'm fine with doing that separately though, that might be tricky.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:17317-17321
@@ -17311,2 +17316,7 @@
   case ISD::FP_TO_SINT:
+    // FP_TO_INT*_IN_MEM is not legal for f16 inputs.  Do not convert
+    // (FP_TO_SINT (load f16)) to FP_TO_INT*.
+    if (N->getOperand(0).getValueType() == MVT::f16)
+      break;
+    // fallthrough in the false-branch
   case ISD::FP_TO_UINT: {
----------------
Why isn't this in the FP_TO_UINT block?  Either way, please add uitofp/fptoui tests.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:17367-17373
@@ -17356,2 +17366,9 @@
   }
+  case ISD::FP_EXTEND: {
+    // Right now, only MVT::v2f32 has OperationAction for FP_EXTEND.
+    // No other ValueType for FP_EXTEND should reach this point.
+    assert(N->getValueType(0) == MVT::v2f32 &&
+           "Do not know how to legalize this Node");
+    return;
+  }
   case ISD::INTRINSIC_W_CHAIN: {
----------------
Does v2f32 even hit this?  Without this patch it should trigger the default unreachable, why would that change?

http://reviews.llvm.org/D9092

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