[PATCH] [mips] [IAS] Give expandLoadAddressSym() more specific arguments. NFC.

Toma Tabacu toma.tabacu at imgtec.com
Mon Apr 27 06:09:09 PDT 2015


Hi dsanders,

If we only pass the necessary operands, we don't have to determine the position of the symbol operand when entering expandLoadAddressSym().
This simplifies the expandLoadAddressSym() code.

http://reviews.llvm.org/D9291

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp
===================================================================
--- lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -194,8 +194,8 @@
   bool expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc,
                                   SmallVectorImpl<MCInst> &Instructions);
 
-  void expandLoadAddressSym(MCInst &Inst, SMLoc IDLoc,
-                            SmallVectorImpl<MCInst> &Instructions);
+  void expandLoadAddressSym(const MCOperand *DstRegOp, const MCOperand *SymOp,
+                            SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions);
 
   void expandMemInst(MCInst &Inst, SMLoc IDLoc,
                      SmallVectorImpl<MCInst> &Instructions, bool isLoad,
@@ -1884,17 +1884,18 @@
 bool
 MipsAsmParser::expandLoadAddressReg(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
                                     SmallVectorImpl<MCInst> &Instructions) {
+  const MCOperand *DstRegOp = &Inst.getOperand(0);
+  assert(DstRegOp->isReg() && "expected register operand kind");
+
   const MCOperand *ImmOp = &Inst.getOperand(2);
   assert((ImmOp->isImm() || ImmOp->isExpr()) &&
          "expected immediate operand kind");
   if (!ImmOp->isImm()) {
-    expandLoadAddressSym(Inst, IDLoc, Instructions);
+    expandLoadAddressSym(DstRegOp, ImmOp, IDLoc, Instructions);
     return false;
   }
   const MCOperand *SrcRegOp = &Inst.getOperand(1);
   assert(SrcRegOp->isReg() && "expected register operand kind");
-  const MCOperand *DstRegOp = &Inst.getOperand(0);
-  assert(DstRegOp->isReg() && "expected register operand kind");
 
   if (loadImmediate(ImmOp, DstRegOp, SrcRegOp, Is32BitImm, IDLoc, Instructions))
     return true;
@@ -1905,41 +1906,30 @@
 bool
 MipsAsmParser::expandLoadAddressImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
                                     SmallVectorImpl<MCInst> &Instructions) {
+  const MCOperand *DstRegOp = &Inst.getOperand(0);
+  assert(DstRegOp->isReg() && "expected register operand kind");
+
   const MCOperand *ImmOp = &Inst.getOperand(1);
   assert((ImmOp->isImm() || ImmOp->isExpr()) &&
          "expected immediate operand kind");
   if (!ImmOp->isImm()) {
-    expandLoadAddressSym(Inst, IDLoc, Instructions);
+    expandLoadAddressSym(DstRegOp, ImmOp, IDLoc, Instructions);
     return false;
   }
-  const MCOperand *DstRegOp = &Inst.getOperand(0);
-  assert(DstRegOp->isReg() && "expected register operand kind");
 
   if (loadImmediate(ImmOp, DstRegOp, nullptr, Is32BitImm, IDLoc, Instructions))
     return true;
 
   return false;
 }
 
 void
-MipsAsmParser::expandLoadAddressSym(MCInst &Inst, SMLoc IDLoc,
+MipsAsmParser::expandLoadAddressSym(const MCOperand *DstRegOp,
+                                    const MCOperand *SymOp, SMLoc IDLoc,
                                     SmallVectorImpl<MCInst> &Instructions) {
-  // FIXME: If we do have a valid at register to use, we should generate a
-  // slightly shorter sequence here.
   MCInst tmpInst;
-  int ExprOperandNo = 1;
-  // Sometimes the assembly parser will get the immediate expression as
-  // a $zero + an immediate.
-  if (Inst.getNumOperands() == 3) {
-    assert(Inst.getOperand(1).getReg() ==
-           (isGP64bit() ? Mips::ZERO_64 : Mips::ZERO));
-    ExprOperandNo = 2;
-  }
-  const MCOperand &SymOp = Inst.getOperand(ExprOperandNo);
-  assert(SymOp.isExpr() && "expected symbol operand kind");
-  const MCOperand &RegOp = Inst.getOperand(0);
-  unsigned RegNo = RegOp.getReg();
-  const MCSymbolRefExpr *Symbol = cast<MCSymbolRefExpr>(SymOp.getExpr());
+  unsigned RegNo = DstRegOp->getReg();
+  const MCSymbolRefExpr *Symbol = cast<MCSymbolRefExpr>(SymOp->getExpr());
   const MCSymbolRefExpr *HiExpr =
       MCSymbolRefExpr::Create(Symbol->getSymbol().getName(),
                               MCSymbolRefExpr::VK_Mips_ABS_HI, getContext());

EMAIL PREFERENCES
  http://reviews.llvm.org/settings/panel/emailpreferences/
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D9291.24470.patch
Type: text/x-patch
Size: 3897 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150427/a0d5b531/attachment.bin>


More information about the llvm-commits mailing list