[llvm] r235665 - [PowerPC] Support register name prefixes for vector registers

[Hal Finkel]

Author: hfinkel
Date: Thu Apr 23 18:16:22 2015
New Revision: 235665

URL: http://llvm.org/viewvc/llvm-project?rev=235665&view=rev
Log:
[PowerPC] Support register name prefixes for vector registers

Match binutils by supporting the optional register name prefix for new vector
registers ("vs" for VSX registers and "q" for QPX registers).

Modified:
    llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
    llvm/trunk/test/MC/PowerPC/qpx.s
    llvm/trunk/test/MC/PowerPC/vsx.s

Modified: llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp?rev=235665&r1=235664&r2=235665&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp Thu Apr 23 18:16:22 2015
@@ -1219,10 +1219,18 @@ MatchRegisterName(const AsmToken &Tok, u
                !Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) {
       RegNo = FRegs[IntVal];
       return false;
+    } else if (Name.startswith_lower("vs") &&
+               !Name.substr(2).getAsInteger(10, IntVal) && IntVal < 64) {
+      RegNo = VSRegs[IntVal];
+      return false;
     } else if (Name.startswith_lower("v") &&
                !Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) {
       RegNo = VRegs[IntVal];
       return false;
+    } else if (Name.startswith_lower("q") &&
+               !Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) {
+      RegNo = QFRegs[IntVal];
+      return false;
     } else if (Name.startswith_lower("cr") &&
                !Name.substr(2).getAsInteger(10, IntVal) && IntVal < 8) {
       RegNo = CRRegs[IntVal];

Modified: llvm/trunk/test/MC/PowerPC/qpx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/qpx.s?rev=235665&r1=235664&r2=235665&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/qpx.s (original)
+++ llvm/trunk/test/MC/PowerPC/qpx.s Thu Apr 23 18:16:22 2015
@@ -1,6 +1,7 @@
 # RUN: llvm-mc -triple powerpc64-bgq-linux --show-encoding %s | FileCheck %s
 
-# FIXME: print qvflogical aliases.
+# CHECK: qvfabs 3, 5                     # encoding: [0x10,0x60,0x2a,0x10]
+         qvfabs %q3, %q5
 
 # CHECK: qvfabs 3, 5                     # encoding: [0x10,0x60,0x2a,0x10]
          qvfabs 3, 5

Modified: llvm/trunk/test/MC/PowerPC/vsx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/vsx.s?rev=235665&r1=235664&r2=235665&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/vsx.s (original)
+++ llvm/trunk/test/MC/PowerPC/vsx.s Thu Apr 23 18:16:22 2015
@@ -1,6 +1,10 @@
 # RUN: llvm-mc -triple powerpc64-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
 # RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
+# CHECK-BE: xxswapd 7, 63                      # encoding: [0xf0,0xff,0xfa,0x56]
+# CHECK-LE: xxswapd 7, 63                      # encoding: [0x56,0xfa,0xff,0xf0]
+            xxswapd %vs7, %vs63
+
 # CHECK-BE: lxsdx 39, 5, 31                     # encoding: [0x7c,0xe5,0xfc,0x99]
 # CHECK-LE: lxsdx 39, 5, 31                     # encoding: [0x99,0xfc,0xe5,0x7c]
             lxsdx 39, 5, 31