[llvm] r235639 - ARM: When re-creating a branch via InsertBranch, preserve CPSR flags.

[Peter Collingbourne]

Author: pcc
Date: Thu Apr 23 15:31:32 2015
New Revision: 235639

URL: http://llvm.org/viewvc/llvm-project?rev=235639&view=rev
Log:
ARM: When re-creating a branch via InsertBranch, preserve CPSR flags.

In particular, this preserves the kill flag, which allows the Thumb2 cbn?z
optimization to be applied in cases where a branch has been re-created after
the live variables analysis pass, e.g. by the machine block placement pass.

This appears to be low risk; a number of other targets seem to already be
doing something similar, e.g. AArch64, PowerPC.

Differential Revision: http://reviews.llvm.org/D9184

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll
    llvm/trunk/test/CodeGen/Thumb2/v8_IT_5.ll

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=235639&r1=235638&r2=235639&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Thu Apr 23 15:31:32 2015
@@ -410,6 +410,8 @@ ARMBaseInstrInfo::InsertBranch(MachineBa
   assert((Cond.size() == 2 || Cond.size() == 0) &&
          "ARM branch conditions have two components!");
 
+  // For conditional branches, we use addOperand to preserve CPSR flags.
+
   if (!FBB) {
     if (Cond.empty()) { // Unconditional branch?
       if (isThumb)
@@ -418,13 +420,13 @@ ARMBaseInstrInfo::InsertBranch(MachineBa
         BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
     } else
       BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB)
-        .addImm(Cond[0].getImm()).addReg(Cond[1].getReg());
+        .addImm(Cond[0].getImm()).addOperand(Cond[1]);
     return 1;
   }
 
   // Two-way conditional branch.
   BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB)
-    .addImm(Cond[0].getImm()).addReg(Cond[1].getReg());
+    .addImm(Cond[0].getImm()).addOperand(Cond[1]);
   if (isThumb)
     BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB).addImm(ARMCC::AL).addReg(0);
   else

Modified: llvm/trunk/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll?rev=235639&r1=235638&r2=235639&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll Thu Apr 23 15:31:32 2015
@@ -79,7 +79,7 @@ declare void @terminatev()
 ; CHECK: str r0, [sp, [[OFFSET:#[0-9]+]]]
 ; CHECK: ldr [[R0:r[0-9]+]], [sp, [[OFFSET]]]
 ; CHECK: {{.*}}@ %do.body.i.i.i
-; CHECK: cmp [[R0]], #0
+; CHECK: cbz [[R0]]
 
 %"class.std::__1::basic_string" = type { %"class.std::__1::__compressed_pair" }
 %"class.std::__1::__compressed_pair" = type { %"class.std::__1::__libcpp_compressed_pair_imp" }

Modified: llvm/trunk/test/CodeGen/Thumb2/v8_IT_5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/v8_IT_5.ll?rev=235639&r1=235638&r2=235639&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/v8_IT_5.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/v8_IT_5.ll Thu Apr 23 15:31:32 2015
@@ -3,8 +3,7 @@
 ; CHECK: it	ne
 ; CHECK-NEXT: cmpne
 ; CHECK-NEXT: bne [[JUMPTARGET:.LBB[0-9]+_[0-9]+]]
-; CHECK: cmp
-; CHECK-NEXT: beq
+; CHECK: cbz
 ; CHECK-NEXT: %if.else163
 ; CHECK-NEXT: mov.w
 ; CHECK-NEXT: b