[PATCH] [X86][SSE] Add v16i8/v32i8 multiplication support

Simon Pilgrim llvm-dev at redking.me.uk
Wed Apr 22 11:30:47 PDT 2015


Thanks Elena for the review. I've updated the patch with your suggestions for SSE2/SSE4.1/AVX2 specific optimizations. If AVX512BW support for vpmovsxbw (zmm) and vpmovwb (xmm,ymm,zmm) (TRUNCATE) were added I could include support for v64i8 as well.

Reviewing this updated patch, it is quite bulky. Something that I'm considering is postponing this and improving support for SSE2/SSE41 for SIGN_EXTEND and SIGN_EXTEND_VECTOR_INREG first which would permit all of their specific code to be removed.


REPOSITORY
  rL LLVM

http://reviews.llvm.org/D9115

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avx2-arith.ll
  test/CodeGen/X86/pmul.ll

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