[PATCH] [AArch64] Handle vec4 sitofp and uitofp for half
ahmed.bougacha at gmail.com
Tue Apr 21 15:14:29 PDT 2015
On top of James' request, a test for smaller vector sizes might also
be useful, see https://llvm.org/bugs/show_bug.cgi?id=21277. Feel free
to take it and mark as fixed, the patch should be enough.
Also, I realize this might require a different fix (if any), but what
about i8->f16, or i16->f16 conversions? I don't know whether we widen
v4i8 or not, but if we do, to avoid scalarizing, you can probably test
v8i8 -> v8f16.
On Tue, Apr 21, 2015 at 12:49 PM, James Molloy <james at jamesmolloy.co.uk> wrote:
> Hi Pirama,
> This looks OK to me, but could you please add a test for v8f16 and v16f16 to
> check oversize vectors are handled sanely? I'm trying to keep the backend
> On Tue, 21 Apr 2015 at 20:44, Pirama Arumuga Nainar <pirama at google.com>
>> IIUC, this patch shouldn't affect v4i32 to v4f32 or v4f64 operations, but
>> couldn't find any tests for those operations. I confirmed that locally, and
>> can add tests with this patch if requested.
>> In a test of v4f16 operations (similar to the comprehensive test in
>> http://reviews.llvm.org/D8648), only sitofp and uitofp cause problems, and
>> will be fixed with this patch.
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