[PATCH] [DebugInfo] Add debug locations to constant SD nodes

Sergey Dmitrouk sdmitrouk at accesssoftek.com
Tue Apr 21 07:28:13 PDT 2015


Anton and Eric were right, there were unintended changes, thanks. I've replaced `SDLoc()` in several places, which had order field set and it lead to instruction reordering. Searched for such pattern, there were only three such cases, it was side effect of introducing variable for debug locations (some functions created identical object a lot of times and I didn't want to add even more instances). Reverted those accidental changes and changes in tests, which pass fine now, as well as rebased to current trunk.


REPOSITORY
  rL LLVM

http://reviews.llvm.org/D9084

Files:
  include/llvm/CodeGen/SelectionDAG.h
  include/llvm/CodeGen/SelectionDAGISel.h
  include/llvm/CodeGen/SelectionDAGNodes.h
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
  lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
  lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  lib/CodeGen/SelectionDAG/StatepointLowering.cpp
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64InstrFormats.td
  lib/Target/AArch64/AArch64InstrInfo.td
  lib/Target/ARM/ARMISelDAGToDAG.cpp
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMInstrInfo.td
  lib/Target/ARM/ARMInstrNEON.td
  lib/Target/ARM/ARMInstrThumb.td
  lib/Target/ARM/ARMInstrThumb2.td
  lib/Target/ARM/ARMInstrVFP.td
  lib/Target/ARM/ARMSelectionDAGInfo.cpp
  lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
  lib/Target/Hexagon/HexagonISelLowering.cpp
  lib/Target/Hexagon/HexagonInstrInfo.td
  lib/Target/Hexagon/HexagonInstrInfoV4.td
  lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
  lib/Target/MSP430/MSP430ISelLowering.cpp
  lib/Target/Mips/Mips16ISelDAGToDAG.cpp
  lib/Target/Mips/MipsISelDAGToDAG.h
  lib/Target/Mips/MipsISelLowering.cpp
  lib/Target/Mips/MipsSEISelDAGToDAG.cpp
  lib/Target/Mips/MipsSEISelLowering.cpp
  lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
  lib/Target/NVPTX/NVPTXISelDAGToDAG.h
  lib/Target/NVPTX/NVPTXISelLowering.cpp
  lib/Target/NVPTX/NVPTXInstrInfo.td
  lib/Target/NVPTX/NVPTXVector.td
  lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCInstr64Bit.td
  lib/Target/PowerPC/PPCInstrAltivec.td
  lib/Target/PowerPC/PPCInstrHTM.td
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/R600/AMDGPUISelDAGToDAG.cpp
  lib/Target/R600/AMDGPUISelLowering.cpp
  lib/Target/R600/AMDGPUInstructions.td
  lib/Target/R600/R600ISelLowering.cpp
  lib/Target/R600/R600ISelLowering.h
  lib/Target/R600/SIISelLowering.cpp
  lib/Target/R600/SIInstrInfo.td
  lib/Target/Sparc/SparcISelDAGToDAG.cpp
  lib/Target/Sparc/SparcISelLowering.cpp
  lib/Target/Sparc/SparcInstr64Bit.td
  lib/Target/Sparc/SparcInstrInfo.td
  lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
  lib/Target/SystemZ/SystemZISelLowering.cpp
  lib/Target/SystemZ/SystemZOperands.td
  lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
  lib/Target/X86/X86ISelDAGToDAG.cpp
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86InstrCompiler.td
  lib/Target/X86/X86InstrFragmentsSIMD.td
  lib/Target/X86/X86InstrInfo.td
  lib/Target/X86/X86InstrShiftRotate.td
  lib/Target/X86/X86SelectionDAGInfo.cpp
  lib/Target/XCore/XCoreISelDAGToDAG.cpp
  lib/Target/XCore/XCoreISelLowering.cpp
  lib/Target/XCore/XCoreInstrInfo.td
  test/DebugInfo/AArch64/constant-dbgloc.ll
  test/DebugInfo/ARM/constant-dbgloc.ll
  test/DebugInfo/constant-sdnodes-have-dbg-location.ll

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